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NBSG16MMNR2G View Datasheet(PDF) - ON Semiconductor

Part NameDescriptionManufacturer
NBSG16MMNR2G 2.5 V/3.3 VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer ON-Semiconductor
ON Semiconductor ON-Semiconductor
NBSG16MMNR2G Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
VCC
VTD
50 W 50 W
D
D
VTD
50 W
50 W
VEE
Figure 2. Logic Diagram
NBSG16M
VCC
50 W
Q
Q
50 W
Q
Q
VBB
16 mA
VEE
Figure 3. CML Output Structure
Table 2. Interfacing Options
INTERFACING OPTIONS
CML
LVDS
ACCOUPLED
RSECL, PECL, NECL
LVTTL, LVCMOS
CONNECTIONS
Connect VTD and VTD to VCC
Connect VTD and VTD together
Bias VTD and VTD Inputs within (VIHCMR)
Common Mode Range
Standard ECL Termination Techniques
An external voltage should be applied to the
unused complementary differential input.
Nominal voltage 1.5 V for LVTTL and VCC/2 for
LVCMOS inputs.
Table 3. ATTRIBUTES
Characteristics
Value
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 1 kV
> 100 V
> 4 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 4)
Pb Pkg
PbFree Pkg
QFN16
Level 1
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V0 @ 0.125 in
Transistor Count
145
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
4. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.
http://onsemi.com
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