NBSG16M
2.5 V/3.3 V Multilevel Input
to CML Clock/Data
Receiver/Driver/Translator
Buffer
Description
The NBSG16M is a differential current mode logic (CML)
receiver/driver/translator buffer. The device is functionally equivalent
to the EP16, LVEP16, or SG16 devices with CML output structure and
lower EMI capabilities.
Inputs incorporate internal 50 W termination resistors and accept
LVNECL (Negative ECL), LVPECL (Positive ECL), LVTTL,
LVCMOS, CML, or LVDS. The CML output structure contains
internal 50 W source termination resistor to VCC. The device
generates 400 mV output amplitude with 50 W receiver resistor to
VCC.
The VBB pin is internally generated voltage supply available to this
device only. For all single−ended input conditions, the unused
complementary differential input is connected to VBB as a switching
reference voltage. VBB may also rebias AC coupled inputs. When
used, decouple VBB via a 0.01 mF capacitor and limit current sourcing
or sinking to 0.5 mA. When not used, VBB output should be left open.
Features
• Maximum Input Clock Frequency > 10 GHz Typical
• Maximum Input Data Rate > 10 Gb/s Typical
• 120 ps Typical Propagation Delay
• 35 ps Typical Rise and Fall Times
• Positive CML Output with Operating Range:
VCC = 2.375 V to 3.465 V with VEE = 0 V
• Negative CML Output with RSNECL or NECL Inputs with
Operating Range: VCC = 0 V with VEE = −2.375 V to −3.465 V
• CML Output Level; 400 mV Peak−to−Peak Output with
50 W Receiver Resistor to VCC
• 50 W Internal Input and Output Termination Resistors
• Compatible with Existing 2.5 V/3.3 V LVEP, EP, LVEL
and SG Devices
• VBB Reference Voltage Output
• Pb−Free Packages are Available
http://onsemi.com
1
QFN−16
MN SUFFIX
CASE 485G
MARKING
DIAGRAM*
16
1
SG
16M
ALYW G
G
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
April, 2006 − Rev. 5
Publication Order Number:
NBSG16M/D