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NBSG16 View Datasheet(PDF) - ON Semiconductor

Part Name
Description
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NBSG16 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
1
2
3
4
A
VEE
NC
NC
VEE
B
D
VTD
VCC
Q
C
D
VTD
VCC
Q
D
VEE
VBB
VMM
VEE
Figure 1. BGA−16 Pinout (Top View)
NBSG16
VEE VBB VMM VEE
16 15 14 13
Exposed Pad (EP)
VTD 1
D2
D3
VTD 4
NBSG16
12 VCC
11 Q
10 Q
9 VCC
5678
VEE NC NC VEE
Figure 2. QFN−16 Pinout (Top View)
Table 1. PIN DESCRIPTION
Pin
BGA
C2
QFN
1
Name
VTD
I/O
Description
Internal 50 W Termination Pin. See Table 2.
C1
2
D
ECL, CML,
Inverted Differential Input. Internal 75 kW to VEE and 36.5 kW to VCC.
LVCMOS, LVDS,
LVTTL Input
B1
3
D
ECL, CML,
Noninverted differential input. Internal 75 kW to VEE.
LVCMOS, LVDS,
LVTTL Input
B2
4
VTD
Internal 50 W Termination Pin. See Table 2.
A1,D1,A4, 5,8,13,16 VEE
D4
Negative Supply Voltage
A2,A3
6,7
NC
No Connect
B3,C3
B4
C4
D3
D2
N/A
9,12
VCC
Positive Supply Voltage
10
Q
RSECL Output Noninverted Differential Output. Typically Terminated with 50 W to
VTT = VCC − 2 V
11
Q
RSECL Output Inverted Differential Output. Typically Terminated with 50 W to VTT = VCC − 2 V
14
VMM
LVCMOS Reference Voltage Output. (VCC − VEE)/2
15
VBB
ECL Reference Voltage Output
EP
Exposed Pad. (Note 2)
1. The NC pins are electrically connected to the die and MUST be left open.
2. All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation. The thermally exposed pad on package
bottom (see case drawing) must be attached to a heat−sinking conduit.
3. In the differential configuration when the input termination pins (VTD, VTD) are connected to a common termination voltage, and if no signal
is applied then the device will be susceptible to self−oscillation.
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