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NB6L16DR2G View Datasheet(PDF) - ON Semiconductor

Part NameDescriptionManufacturer
NB6L16DR2G 2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL Clock or Data Receiver/Driver/Translator Buffer ON-Semiconductor
ON Semiconductor ON-Semiconductor
NB6L16DR2G Datasheet PDF : 12 Pages
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NB6L16
D
D
Q
Q
tPLH
VINPP(D) = VIH(D) − VIL(D)
VINPP(D) = VIH(D) − VIL(D)
VOUTPP(Q) = VOH(Q) − VOL(Q)
VOUTPP(Q) = VOH(Q) − VOL(Q)
tPHL
Figure 9. AC Reference Measurement
Vth
D
D
Vth
Figure 10. Differential Input Driven
Single−Ended
VCC
Vthmax
Vth
Vthmin
GND
VIHmax
VILmax
VIHTYP
VthTYP
VILTYP
VIHmin
VILmin
Figure 12. Vth Diagram
D
D
Figure 11. Differential Inputs Driven
Differentially
VCC
VCMmax
VCMR
VCMmax
GND
VIHDmax
VILDmax
VID = VIHD − VILD
VIHDtyp
VILDtyp
VIHDmin
VILDmin
Figure 13. VCMR Diagram
Q
Driver
Device
Q
Zo = 50 W
Zo = 50 W
50 W
50 W
D
Receiver
Device
D
VTT
VTT = VCC − 2.0 V
Figure 14. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
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