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NB100ELT23LMNR4 View Datasheet(PDF) - ON Semiconductor

Part NameDescriptionManufacturer
NB100ELT23LMNR4 3.3V Dual Differential LVPECL/LVDS to LVTTL Translator ON-Semiconductor
ON Semiconductor ON-Semiconductor
NB100ELT23LMNR4 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
NB100ELT23L
3.3V Dual Differential
LVPECL/LVDS to LVTTL
Translator
The NB100ELT23L is a dual differential LVPECL/LVDS to LVTTL
translator. Because LVPECL (Positive ECL) or LVDS levels are used,
only +3.3 V and ground are required. The small outline 8-lead package
and the dual gate design of the ELT23L makes it ideal for applications
which require the translation of a clock and a data signal.
The ELT23L is available in only the ECL 100K standard. Since
there are no LVPECL outputs or an external VBB reference, the
ELT23L does not require both ECL standard versions. The LVPECL
inputs are differential. Therefore, the NB100ELT23L can accept any
standard differential LVPECL/LVDS input referenced from a VCC of
+3.3 V.
Features
2.1 ns Typical Propagation Delay
Maximum Operating Frequency > 160 MHz
24 mA LVTTL Outputs
Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V
Pb−Free Packages are Available
http://onsemi.com
8
1
MARKING
DIAGRAMS*
SOIC−8
D SUFFIX
CASE 751
8
KT23L
ALYW
G
1
8
1
TSSOP−8
DT SUFFIX
CASE 948R
8
K23L
ALYWG
G
1
DFN8
MN SUFFIX
CASE 506AA
14
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2007
1
March, 2007 − Rev. 8
Publication Order Number:
NB100ELT23L/D
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