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N08L63W2AB2 View Datasheet(PDF) - ON Semiconductor

Part Name
Description
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N08L63W2AB2 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
N08L63W2A
Functional Block Diagram
Address
Inputs
A0 - A3
Word
Address
Decode
Logic
Address
Inputs
A4 - A18
Page
Address
Decode
Logic
CE1
CE2
WE
Control
OE
Logic
UB
LB
32K Page
x 16 word
x 16 bit
RAM Array
Input/
Output
Mux
and
Buffers
I/O0 - I/O7
I/O8 - I/O15
Functional Description
CE1 CE2 WE OE UB LB
I/O0 - I/O151
MODE
POWER
H
X
X
X
X
X
X
L
X
X
X
X
X
X
X
X
H
H
L
H
L
X3
L1
L1
L
H
H
L
L1
L1
L
H
H
H
L1
L1
High Z
High Z
High Z
Data In
Data Out
High Z
Standby2
Standby2
Standby2
Write3
Read
Active
Standby
Standby
Standby
Active
Active
Active
1. When UB and LB are in select mode (low), I/O0 - I/O15 are affected as shown. When LB only is in the select mode only I/O0 - I/O7
are affected as shown. When UB is in the select mode only I/O8 - I/O15 are affected as shown.
2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally
isolated from any external influence and disabled from exerting any influence externally.
3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
Capacitance1
Item
Symbol
Test Condition
Input Capacitance
I/O Capacitance
CIN
VIN = 0V, f = 1 MHz, TA = 25oC
CI/O
VIN = 0V, f = 1 MHz, TA = 25oC
1. These parameters are verified in device characterization and are not 100% tested
Min Max Unit
8
pF
8
pF
Rev. 8 | Page 2 of 10 | www.onsemi.com
 

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