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MX28F2000P View Datasheet(PDF) - Macronix International

Part NameDescriptionManufacturer
MX28F2000P 2M-BIT [256K x 8] CMOS FLASH MEMORY MCNIX
Macronix International MCNIX
MX28F2000P Datasheet PDF : 33 Pages
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MX28F2000P
AUTOMATIC BLOCK ERASE TIMING WAVEFORM
Block data indicated by A12 to A17 are erased. External
erase verify is not required because data are erased
automatically by internal control circuit. Erasure comple-
tion can be verified by DATA polling and toggle bit
checking after automatic erase starts. Device outputs 0
during erasure and 1 after erasure on Q7. Q0 to Q5 (Q6
is for toggle bit; see toggle bit, DATA polling, timing
waveform) are in high impedance.
Vcc 5V
12V
Vpp
0V
A0 ~ A11
A12 ~ A17
CE
WE
OE
Q7
Q0~Q5
Setup auto block erase/erase command
tVPS
Block
Block
address 0 address 1
tCH
tCS
tAS
tCWC
tAH
tBALC
tCEPH1
tOES tCEP
tCEP tCEPH2
tDS tDH tDS tDH
Command in Command in
Command in Command in
Command #20H Command #D0H
*Refer to page 2 for detailed block address.
Auto block erase & DATA polling
tVPH
Block
address #
tBAL
tAETB
tAH1
tCESC
tDF
tDPA
DATA polling
P/N: PM0380
REV. 1.5, OCT 29, 1998
20
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