MSM5116160F View Datasheet(PDF) -
| MSM5116160F Datasheet PDF : 0 Pages | |||
1Semiconductor
FEDD5116160F-02
MSM5116160F
BLOCK DIAGRAM
RAS
Timing
Generator
LCAS
UCAS
Column
8 Address
Buffers
WE
OE
I/O
Controller
I/O
Controller
8 Column Decoders
8
Output
Buffers
8
Input
8 Buffers 8
A0-A7
A8R-A11R
Internal
Address
Counter
Refresh
Control Clock
8
Row
Address 12 Row
4 Buffers
Deco-
Word
ders
Drivers
Sense Amplifiers
I/O
16 Selector 16
Memory
Cells
8
Input
Buffers 8
8
Output
Buffers 8
VCC
On Chip
VBB Generator
On Chip
IVCC Generator
VSS
DQ1-DQ8
DQ9-DQ16
FUNCTION TABLE
Input Pin
DQ Pin
RAS LCAS UCAS WE
OE
DQ1-DQ8
DQ9-DQ16
H
*
*
*
*
High-Z
High-Z
L
H
H
*
*
High-Z
High-Z
L
L
H
H
L
DOUT
High-Z
L
H
L
H
L
High-Z
DOUT
L
L
L
H
L
DOUT
DOUT
L
L
H
L
H
DIN
Don’t Care
L
H
L
L
H
Don’t Care
DIN
L
L
L
L
H
DIN
DIN
L
L
L
H
H
High-Z
High-Z
* : “H” or “L”
Function Mode
Standby
Refresh
Lower Byte Read
Upper Byte Read
Word Read
Lower Byte Write
Upper Byte Write
Word Write
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