74LVC827A View Datasheet(PDF) - Philips Electronics

Part Name

Description

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74LVC827A

10-bit buffer/line driver with 5-volt tolerant inputs/outputs (3-State)

Philips Electronics 

Philips Semiconductors

10-bit buffer/line driver with 5-volt tolerant

inputs/outputs (3-State)

Product specification

74LVC827A

FEATURES

• 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic

• Supply voltage range of 2.7V to 3.6V

• Complies with JEDEC standard no. 8-1A

• CMOS low power consumption

• Direct interface with TTL levels

• High impedance when VCC = 0V

DESCRIPTION

The 74LVC827A is a high performance, low-power, low-voltage

Si-gate CMOS device and superior to most advanced CMOS

compatible TTL families.

Inputs can be driven from either 3.3V or 5.0V devices. In 3-state

operation, outputs can handle 5V. This feature allows the use of

these devices as translators in a mixed 3.3V/5V environment.

The 74LVC827A is a10-bit buffer/line driver with 3-State outputs The

3-State outputs are controlled by the output enable inputs OE1 and

OE2.

A HIGH on OEn causes the outputs to assume a high impedance

OFF-state.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns

SYMBOL

PARAMETER

CONDITIONS

tPHL/tPLH

Propagation delay

An to Yn

CL = 50 pF;

VCC = 3.3 V

CI

Input capacitance

CPD

Power dissipation capacitance per buffer Notes 1 and 2

NOTES:

1. CPD is used to determine the dynamic power dissipation (PD in µW)

PD = CPD × VCC2 × fi )ȍ (CL × VCC2 × fo) where:

fi = input frequency in MHz; CL = output load capacity in pF;

fo = output frequency in MHz; VCC = supply voltage in V;

ȍ (CL × VCC2 × fo) = sum of the outputs.

2. The condition is VI = GND to VCC

TYPICAL

4

5.0

24

ORDERING INFORMATION

PACKAGES

24-Pin Plastic SO

24-Pin Plastic SSOP Type II

24-Pin Plastic TSSOP Type I

TEMPERATURE RANGE OUTSIDE NORTH AMERICA

–40°C to +85°C

74LVC827A D

–40°C to +85°C

–40°C to +85°C

74LVC827A DB

74LVC827A PW

NORTH AMERICA

74LVC827A D

74LVC827A DB

7LVC827APW DH

UNIT

ns

pF

pF

PKG. DWG. #

SOT137-1

SOT340-1

SOT355-1

PIN DESCRIPTION

PIN NUMBER SYMBOL

1, 13

2, 3, 4, 5, 6,

7, 8, 9, 10, 11

12

23, 22, 21, 20,

19, 18, 17, 16,

15, 14

24

OE1, OE2

A0 to A9

GND

Y0 to Y9

VCC

NAME AND FUNCTION

Output enable input

(active LOW)

Data inputs

Ground (0 V)

Bus outputs

Positive supply voltage

FUNCTION TABLE

INPUTS

OE1

OE2

An

L

L

L

L

L

H

X

H

X

H

X

X

H = HIGH voltage level

L = LOW voltage level

X = Don’t care

Z = high impedance OFF-state

OUTPUTS

Yn

L

H

Z

Z

1998 Sep 04

2

853–2117 19969

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