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MC68HC05J3 View Datasheet(PDF) - Motorola => Freescale

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MC68HC05J3 Datasheet PDF : 92 Pages
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Internal
processor clock
Internal
reset
Internal
timer clocks
T00
T01
T10
T11
16-bit
counter
$FFFC
$FFFD
$FFFE
$FFFF
External reset
or end of POR
Note:
The counter and timer control registers are the only ones affected by power-on or external reset.
Figure 6-2 Timer state timing diagram for reset
6
Internal
processor clock
Internal
timer clocks
T00
T01
T10
T11
16-bit
counter
$F123
$F124
$F125
$F126
Input
edge
Internal
capture latch
Input capture
register
$????
$F124
Input capture
flag
Note:
If the input edge occurs in the shaded area from one timer state T10 to the next timer state T10, then
the input capture flag will be set during the next T11 state.
Figure 6-3 Timer state timing diagram for input capture
MC68HC05J3
16-BIT PROGRAMMABLE TIMER
TPG
MOTOROLA
6-9
 

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