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56F8027 View Datasheet(PDF) - Freescale Semiconductor

Part Name
Description
View to exact match
56F8027
Freescale
Freescale Semiconductor Freescale
56F8027 Datasheet PDF : 181 Pages
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Program Map
Table 4-2 Interrupt Vector Table Contents1 (Continued)
Peripheral
Vector
Number
Priority Vector Base
Level
Address +
Interrupt Function
CMPA
53
CMPB
54
PIT0
55
0-2
P:$6A
0-2
P:$6C
0-2
P:$6E
Comparator A
Comparator B
Interval Timer 0
PIT1
56
PIT2
57
ADC
58
0-2
P:$70
0-2
P:$72
0-2
P:$74
Interval Timer 1
Interval Timer 2
ADC A Conversion Complete
ADC
59
0-2
P:$76
ADC B Conversion Complete
ADC
60
PWM
61
PWM
62
0-2
P:$78
0-2
P:$7A
0-2
P:$7C
ADC Zero Crossing or Limit Error
Reload PWM
PWM Fault
SWILP
63
-1
P:$7E
SW Interrupt Low Priority
1. Two words are allocated for each entry in the vector table. This does not allow the full address range to be referenced
from the vector table, providing only 19 bits of address.
2. If the VBA is set to the reset value, the first two locations of the vector table will overlay the chip reset addresses since
the reset address would match the base of this vector table.
4.3 Program Map
The Program Memory map is shown in Table 4-3 and Table 4-4.
Table 4-3 Program Memory Map1 at Reset for 56F8037
Begin/End Address
Memory Allocation
P: $1F FFFF
P: $00 9000
RESERVED
P: $00 8FFF
P: $00 8000
On-Chip RAM2
8KB
P: $00 7FFF
P: $00 0000
Internal Program Flash
64KB
Cop Reset Address = $00 0002
Boot Location = $00 0000
1. All addresses are 16-bit Word addresses.
2. This RAM is shared with Data space starting at address X: $00 0000; see Figure 4-1.
56F8037/56F8027 Data Sheet, Rev. 6
Freescale Semiconductor
47
 

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