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MC33927 View Datasheet(PDF) - Freescale Semiconductor

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Description
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MC33927
Freescale
Freescale Semiconductor Freescale
MC33927 Datasheet PDF : 44 Pages
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ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics (continued)
Characteristics noted under conditions 8.0V VPWR = VBAT 40V, -40°C TA 125°C, unless otherwise noted. Typical
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
OVERCURRENT COMPARATOR
Common Mode Input Range
Input Offset Voltage
Overcurrent Comparator Threshold Hysteresis(19)
Output Voltage
High-Level at IOH = -500µA
Low-Level at IOL = 500µA
VCM
2.0
VDD-0.02
V
VOS_OC
-50
50
mV
VOC_HYST
50
300
mV
V
VOH
0.85 VDD
VDD
VOL
0.5
HOLD OFF CIRCUIT
VDD Threshold (VDD Falling)
RST pin High
VDD_TH
1.5
4.0
V
Hold Off Current (At Each GATE Pin)
3.0V < VBAT < 40V(20)
IHOLD
10
300
µA
PHASE COMPARATOR
High-Level Input Voltage Threshold
Low-Level Input Voltage Threshold
High-Level Output Voltage at IOH = -500µA
Low-Level Output Voltage at IOL = 500µA
High-Side Source Input Resistance(19), (23)
DESATURATION DETECTOR
Desaturation Detector Threshold(21)
CURRENT SENSE AMPLIFIER
VIH_TH
VIL_TH
VOH
VOL
RIN
0.5 VBAT
0.3 VBAT
0.85 VDD
VDES_TH
1.2
0.65 VBAT
V
0.45 VBAT
V
VDD
V
0.5
V
50
k
1.4
1.6
V
Recommended External Series Resistor (See Figure 9)
Recommended External Feedback Resistor (See Figure 9)
Limited by the Output Voltage Dynamic Range
RS
1.0
k
RFB
5.0
15
k
Maximum Input Differential Voltage (See Figure 9)
VID = VAMP_P - VAMP_N
Input Common Mode Range(19), (22)
Input Offset Voltage
RS = 1k, VCM = 0.0V
Input Offset Voltage Drift(19)
Input Bias Current
VCM = 2.0V
VID
-800
+800
mV
VCΜ
VOS
0
3.0
V
-15
+15
mV
δVOS/δT
-10
µV/°C
Ib
-200
+200
nA
Notes
19. This parameter is a design characteristic, not production tested.
20. The hold off circuit is designed to operate over the full operating range of VBAT. The specification indicates the conditions used in
production test.
21. Desaturation is measured as the voltage drop below VBAT, thus the threshold is compared to the drain-source voltage of the external
high-side FET. See Figure 5.
22. As long as one input is within VCM the output is guaranteed to have the correct phase. Exceeding the common mode rails will not cause
a phase inversion on the output.
23. Input resistance is impedance from high-side source and is referenced to ground. Approximate tolerance is ±20%.
33927
10
Analog Integrated Circuit Device Data
Freescale Semiconductor
 

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