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MC34025PG View Datasheet(PDF) - ON Semiconductor

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Description
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MC34025PG
ON-Semiconductor
ON Semiconductor ON-Semiconductor
MC34025PG Datasheet PDF : 20 Pages
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Vref
RDT
4
5
6
RT
CT
MC34025, MC33025
5.0 V
0V
Oscillator
RT
4
5
6
CT
Oscillator
Additional dead time can be added by the addition of a dead
time resistor from Vref to CT. See text on oscillator section for
more information.
Figure 24. Dead Time Addition
The sync pulse fed into the clock pin must be at least 3.9 V. RT
and CT need to be set 10% slower than the sync frequency. This
circuit is also used in voltage mode operation for master/slave
operation. The clock signal would be coming from the master
which is set at the desired operating frequency, while the slave
is set 10% slower.
Figure 25. External Clock Synchronization
9
ISense
The addition of an RC filter will eliminate instability caused by the
leading edge spike on the current waveform. This sense signal
can also be used at the ramp input pin for current mode control.
For ramp compensation it is necessary to know the gain of the
current feedback loop. If a transformer is used, the gain can be
calculated by:
Ai +
RSense
turns ratio
Figure 26. Resistive Current Sensing
9
Rw
ISense
9
Rw
0
ISense
Figure 27. Primary Side Current Sensing
Figure 28. Primary or Secondary Side
Current Sensing
The addition of an RC filter will eliminate instability caused by the leading edge spike on the current waveform. This sense signal can also
be used at the ramp input pin for current mode control. For ramp compensation it is necessary to know the gain of the current feedback
loop. The gain can be calculated by:
Ai +
Rw
turns ratio
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