Freescale Semiconductor, Inc.
DYNAMIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions 4.75 V ≤ VDD ≤ 5.25 V, 8.0 V ≤ VSUP ≤ 25.0 V, -40°C ≤ TJ ≤ 150°C unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
MICROCONTROLLER INTERFACE
Microcontroller Signal Cycle Time
Microcontroller Signal Low Time
Microcontroller Signal High Time
Microcontroller Signal Duty Cycle for Logic Zero
Microcontroller Signal Duty Cycle for Logic One
Microcontroller Signal Slew Time (Note 5)
Frame Start to Signal Delay Time
Signal End to Frame End Delay Time
Rise Time (Note 5)
Fall Time (Note 5)
BUS TRANSMITTER
t cyc
6.6
–
1000
µs
t cycL
2.0
–
667
µs
t cycH
2.0
–
667
µs
DCLo
30
33
36
%
DCHi
60.0
66.7
72.0
%
t slew
–
–
500
ns
t DLY1
t cyc - 0.1
t cyc
t cyc + 0.1
µs
t DLY2
1.0
–
–
µs
t RISE
0
–
100
ns
t FALL
0
–
100
ns
Idle to Frame and Frame to Idle Slew Rate
C ≤ 5.0 nF
t slew (FRAME)
3.0
V/µs
6.0
10.0
Signal High to Low and Signal Low to High Slew Rate
C ≤ 5.0 nF
t slew (SIGNAL)
V/µs
3.0
4.5
8.0
Data Valid (VSUPx = 25 V, CL ≤ 5.0 nF)
DSIxF, VIN(TH) to DSIxO = 5.3 V
DSIxS, VIN(TH) to DSIxO = 2.6 V
DSIxS, VIN(TH) to DSIxO = 3.4 V
DSIxF, VIN(TH) to DSIxO = 7.0 V
µs
t DVLD1
2.44
–
6.56
t DVLD2
0.25
–
1.3
tDVLD3
0.25
–
1.3
tDVLD4
0.25
–
1.3
BUS RECEIVER
Receiver Delay Time
I = 9.0 mA to DSIxR = 0.8*VDD
I = -1.0 mA to DSIxR = 0.2*VDD
t DRH
–
t DRL
–
ns
400
750
400
750
Notes
5. Slew times and rise and fall times between 10% and 90% of output high and low levels.
33790
6
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
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