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MC3302D View Datasheet(PDF) - Philips Electronics

Part Name
Description
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MC3302D
Philips
Philips Electronics Philips
MC3302D Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
Philips Semiconductors
Quad voltage comparator
Product specification
LM139/239/239A/339/339A/
LM2901/MC3302
DC AND AC ELECTRICAL CHARACTERISTICS
V+=5VDC, LM139: –55°C TA 125°C; LM239/239A: –25°C TA 85°C; LM339/339A: 0°C TA 70°C; LM2901: –40°C TA 125°C,
MC3302: –40°C TA 85°C, unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
LM2901
Min Typ Max
MC3302
Min Typ Max
UNIT
VOS
Input offset voltage2
TA=25°C
Over temp.
±2.0 ±7.0
±9
±15
±3.0 ±20
mV
±40
mV
Input common–mode voltage
VCM
range3
TA=25°C
Over temp.
0
0
V+–1.5 0
V+–2.0 0
V+–1.5
V+–2.0
V
VIDR
Differential input voltage1
Keep all
VINs0VDC
(or V– if need)
V+
V+
V
IBIAS
Input bias current4
IIN(+) or IIN(–) with output in
linear range
TA=25°C
Over temp.
25
250
200 500
25
500
nA
1000
nA
IOS
Input offset current
IOL
Output sink current
Output leakage current
IIN(+)–IIN(–)
TA=25°C
Over temp.
VIN(–)1VDC, VIN(+)=0,
VO1.5VDC,
TA=25°C
VIN(+)1VDC, VIN(–)=0
VO=5VDC,
TA=25°C
VO=30VDC,
over temp.
±5
±50
±50 ±200
6.0 16
±5 ±100
nA
±300
nA
6 16
mA
0.1
1.0
0.1
nA
1.0
µA
ICC
Supply current
AV
Voltage gain
VOL
Saturation voltage
RL=on all comparators,
TA=25°C
0.8
2.0
RL=on all comparators, V+=30V
1.0
2.5
RL15k,
V+=15VDC
25 100
VIN(–)1VDC, VIN(+)=0,
ISINK4mA
TA=25°C
Over temp.
400
400 700
.8
1.8
mA
2 100
mA
V/mV
150 400
mV
700
mV
tLSR
Large–signal response time
VIN=TTL logic swing, VREF=1.4VDC,
VRL=5VDC, RL=5.1k, TA=25°C
300
300
ns
tR
Response time5
VRL=5VDC, RL=5.1k,
TA=25°C
1.3
1.3
µs
NOTES:
1. Positive excursions of input voltage may exceed the power supply level by 17V. As long as the other voltage remains within the
common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than –0.3VDC (or
0.3VDC below the magnitude of the negative power supply, if used).
2. At output switch point, VO 1.4VDC, RS=0with V+ from 5VDC to 30VDC; and over the full input common–mode range (0VDC to
V+ – 1.5VDC). Inputs of unused comparators should be grounded.
3. The input common–mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of
the common–mode voltage range is V+ – 1.5V, but either or both inputs can go to 30VDC without damage.
4. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of
the output so no loading change exists on the reference or input lines.
5. The response time specified is for a 100mV input step with a 5mV overdrive. For larger overdrive signals, 300ns can be obtained (see typical
performance characteristics section).
1995 Nov 27
6
 

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