A BC D
A
Q0
INPUTS
EF
BC
MC14028B
INHIBIT
(NO SELECTION)
–D
Q9
ABCD ABCD AB CD AB CD AB CD ABCD ABCD ABCD
MC14028B MC14028B MC14028B MC14028B MC14028B MC14028B MC14028B MC14028B
Q0
Q9 Q0
Q9 Q0
Q9 Q0
Q9 Q0
Q9 Q0
Q9 Q0
Q9 Q0
Q9
0
78
15 16
23 24
31 32 39 40
47 48
55 56
63
*1/6 MC14069UB
64 OUTPUTS (SELECTED OUTPUT IS HIGH)
Figure 3. Six–Bit Binary 1–of–64 Decoder
A
Q0
Q1
Q2
B
Q3
Q4
MC14028B Q5
C
Q6
Q7
D
Q8
Q9
APPROPRIATE
VOLTAGE
NEON
DISPLAY
OR
9
0
9
APPROPRIATE
VOLTAGE
INCANDESCENT
DISPLAY
21
0
Figure 4. Decimal Digit Display Application
MOTOROLA CMOS LOGIC DATA
MC14028B
117