MC100E457FNR2G View Datasheet(PDF) - ON Semiconductor
Part Name
Description
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MC100E457FNR2G Datasheet PDF : 9 Pages
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MC10E457, MC100E457
5V ECL Triple Differential
2:1 Multiplexer
Description
The MC10E457/100E457 is a 3-bit differential 2:1 multiplexer. The
fully differential data path makes the device ideal for multiplexing low
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skew clock or other skew sensitive signals.
The higher frequency outputs provide the device with a > 1.0 GHz
bandwidth to meet the needs of the most demanding system clock.
Both, separate selects and a common select, are provided to make
the device well suited for both data path and random logic
PLCC−28
FN SUFFIX
CASE 776
applications.
The differential inputs have internal clamp structures which will
force the Q output of a gate in an open input condition to go to a LOW
MARKING DIAGRAM*
state. Thus, inputs of unused gates can be left open and will not affect
1 28
the operation of the rest of the device. Note that the input clamp will
take affect only if both inputs fall 2.5 V below VCC.
The 100 Series contains temperature compensation.
Multiple VBB pins are provided to ease AC coupling input signals.
The VBB pins, internally generated voltage supply pins, are available
to this device only. For single-ended input conditions, the unused
MCxxxE457FNG
AWLYYWW
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
xxx
= 10 or 100
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
Features
• Differential D and Q; VBB available
• 700 ps Max. Propagation Delay
WW = Work Week
G
= Pb−Free Package
*For additional marking information, refer to
• High Frequency Outputs
Application Note AND8002/D.
• Separate and Common Select
• PECL Mode Operating Range: VCC = 4.2 V to 5.7 V
with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
with VEE = −4.2 V to −5.7 V
• Internal Input 50 kW Pulldown Resistors
• ESD Protection: Human Body Model; > 2 kV,
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Machine Model; > 200 V
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC
Latchup Test
• Moisture Sensitivity Level: Pb = 1; Pb−Free = 3
Oxygen Index: 28 to 34
• Transistor Count = 218 devices
• Pb−Free Packages are Available*
For Additional Information, see Application Note
AND8003/D
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
November, 2006 − Rev. 8
Publication Order Number:
MC10E457/D
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