NC 1
Q2
Q3
LVPECL
NC 4
MC100LVELT20
8 VCC
LVTTL
7D
6 NC
Table 1. PIN DESCRIPTION
Pin
Function
Q, Q
Differential PECL Outputs
D
LVTTL Input
VCC
GND
Positive Supply
Ground
NC
No Connect
5 GND
(Top View)
Figure 1. 8−Lead Pinout and Logic Diagram
Table 2. ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
Machine Model
Charged Device Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
SOIC−8
Flammability Rating
Oxygen Index: 28 to 34
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Value
N/A
N/A
> 1.5 kV
> 200 V
> 2 kV
Pb Pkg
Pb−Free Pkg
Level 1
Level 1
UL 94 V−0 @ 0.125 in
150 Devices
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
Power Supply
VI
Input Voltage
Iout
Output Current
GND = 0 V
GND = 0 V
Continuous
Surge
VI VCC
6
V
6
V
50
mA
100
mA
TA
Operating Temperature Range
Tstg
Storage Temperature Range
qJA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
SOIC−8
SOIC−8
−40 to +85
−65 to +150
190
130
°C
°C
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
Tsol
Wave Solder
Pb
Pb−Free
SOIC−8
41 to 44
265
265
°C/W
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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