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MC100EPT23DG View Datasheet(PDF) - ON Semiconductor

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Description
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MC100EPT23DG Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
MC100EPT23
D0 1
8 VCC
D0 2
D1 3
LVPECL LVTTL
7 Q0
6 Q1
D1 4
5 GND
(Top View)
Figure 1. Logic Diagram and 8−Lead Pinout
Table 1. PIN DESCRIPTION
Pin
Function
Q0, Q1
LVTTL/LVCMOS Outputs
D0**, D1**
D0**, D1**
Differential LVPECL/LVDS/CML Inputs
VCC
GND
Positive Supply
Ground
EP
Exposed pad must be connected to a
sufficient thermal conduit. Electrically connect
to the most negative supply or leave floating
open.
** Pins will default to VCC/2 when left open.
Table 2. ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
Machine Model
Charged Device Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Oxygen Index: 28 to 34
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Value
50 kW
50 kW
> 1500 V
> 100 V
> 2 kV
Level 1
UL 94 V−0 @ 0.125 in
91 Devices
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
Power Supply
VI
Input Voltage
Iout
Output Current
GND = 0 V
GND = 0 V
Continuous
Surge
VI  VCC
3.8
V
3.8
V
50
mA
100
mA
TA
Operating Temperature Range
Tstg
Storage Temperature Range
qJA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
SOIC−8
SOIC−8
−40 to +85
−65 to +150
190
130
°C
°C
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
qJA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
SOIC−8
TSSOP−8
TSSOP−8
41 to 44
185
140
°C/W
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
qJA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
TSSOP−8
DFN8
DFN8
41 to 44
129
84
°C/W
°C/W
°C/W
Tsol
Wave Solder
Pb <2 to 3 sec @ 248°C
Pb−Free <2 to 3 sec @ 260°C
265
°C
265
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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