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MC100ELT23DG View Datasheet(PDF) - ON Semiconductor

Part Name
Description
View to exact match
MC100ELT23DG
ON-Semiconductor
ON Semiconductor ON-Semiconductor
MC100ELT23DG Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
MC100ELT23
5 V Dual Differential PECL
to TTL Translator
Description
The MC100ELT23 is a dual differential PECL to TTL translator.
Because PECL (Positive ECL) levels are used, only +5 V and ground
are required. The small outline 8-lead package and the dual gate
design of the ELT23 makes it ideal for applications which require the
translation of a clock and a data signal.
The PECL inputs are differential; therefore, the MC100ELT23 can
accept any standard differential PECL input referenced from a VCC of
5.0 V.
Features
3.5 ns Typical Propagation Delay
24 mA TTL Outputs
Flow Through Pinouts
The 100 Series Contains Temperature Compensation
Operating Range VCC = 4.75 V to 5.25 V with GND = 0 V
Internal Input 50 KW Pulldown Resistors
Q Output Will Default LOW with Inputs Left Open or < 1.3 V
PbFree Packages are Available
http://onsemi.com
MARKING DIAGRAMS*
8
1
8
SOIC8
KLT23
D SUFFIX
ALYW
CASE 751
G
1
8
1
TSSOP8
DT SUFFIX
CASE 948R
8
KT23
ALYWG
G
1
DFN8
MN SUFFIX
CASE 506AA
14
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
M = Date Code
G = PbFree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
December, 2006 Rev. 14
Publication Order Number:
MC100ELT23/D
 

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