MBM29F017A-12PFTN View Datasheet(PDF) - Fujitsu

Part Name

Description

View to exact match

MBM29F017A-12PFTN

FLASH MEMORY CMOS 16M (2M × 8) BIT

Fujitsu 

MBM29F017A-70/-90/-12

SGA0

SGA1

SGA2

SGA3

SGA4

SGA5

SGA6

SGA7

Table 5 Sector Group Addresses

A20

A19

A18

0

0

0

0

0

1

0

1

0

0

1

1

1

0

0

1

0

1

1

1

0

1

1

1

Sectors

SA0 to SA3

SA4 to SA7

SA8 to SA11

SA12 to SA15

SA16 to SA19

SA20 to SA23

SA24 to SA27

SA28 to SA31

Write

Device erasure and programming are accomplished via the command register. The contents of the register serve

as inputs to the internal state machine. The state machine outputs dictate the function of the device.

The command register itself does not occupy any addressable memory location. The register is a latch used to

store the commands, along with the address and data information needed to execute the command. The

command register is written by bringing WE to VIL, while CE is at VIL and OE is at VIH. Addresses are latched on

the falling edge of WE or CE, whichever happens later; while data is latched on the rising edge of WE or CE,

whichever happens first. Standard microprocessor write timings are used.

Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters.

Sector Group Protection

The MBM29F017A features hardware sector group protection. This feature will disable both program and erase

operations in any combination of eight sector groups of memory. Each sector group consists of four adjacent

sectors grouped in the following pattern: sectors 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, and 28-31 (see

Table 5). The sector group protection feature is enabled using programming equipment at the user's site. The

device is shipped with all sector groups unprotected.

To activate this mode, the programming equipment must force VID on address pin A9 and control pin OE, (suggest

VID = 11.5 V), CE = VIL. The sector addresses (A20, A19, and A18) should be set to the sector to be protected.

Tables 4 and 5 define the sector address for each of the thirty two (32) individual sectors, and the sector group

address for each of the eight (8) individual group sectors. Programming of the protection circuitry begins on the

falling edge of the WE pulse and is terminated with the rising edge of the same. Sector addresses must be held

constant during the WE pulse. Refer to figures 14 and 21 for sector protection waveforms and algorithm.

To verify programming of the protection circuitry, the programming equipment must force VID on address pin A9

with CE and OE at VIL and WE at VIH. Scanning the sector addresses (A20, A19, and A18) while (A6, A1, A0) = (0,

1, 0) will produce a logical “1” code at device output DQ0 for a protected sector. Otherwise the device will produce

00H for unprotected sector. In this mode, the lower order addresses, except for A0, A1, and A6 are don’t care.

Address locations with A1 = VIL are reserved for Autoselect manufacturer and device codes.

It is also possible to determine if a sector group is protected in the system by writing an Autoselect command.

Performing a read operation at the address location XX02H, where the higher order addresses (A20, A19, and

A18) are the desired sector group address will produce a logical “1” at DQ0 for a protected sector group. See

Table 3 for Autoselect codes.

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