MB86967 View Datasheet(PDF) - Fujitsu
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Description
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MB86967 Datasheet PDF : 129 Pages
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MB86967
(6) DLCR5: Receive Mode Register
DLCR5 sets the receiver operation mode, and displays the status of the receiver buffer memory.
Read
Write
Initial Value
Bit 7
TST2
0
0
Bit 6
Bit 5
BUF EMP ACPT
—
BAD PKT
1
0
Bit 4
ADD
SIZE
0
Bit 3
Bit 2
ENA SRT ENA
PKT RMT RST
0
0
Bit 1
AM1
0
Bit 0
AM0
1
Bit no. Bit name
7 TST2
(Chip Test 2)
Operation
Read/Write
6 BUF EMP
(Buffer Empty)
Read
Write
5 ACPT BAD PKT Read/Write
(Bad Packet
Receive)
4 ADD SIZE
Read/Write
(Address Size)
3 ENA SRT PKT Read/Write
(Enable Short
Packet Receive)
2 ENA RMT RST Read/Write
(Enable Remote
Reset)
1 and 0 AM1, AM0
(Address
Match Mode)
Read/Write
Value
—
0
1
—
0
1
0
1
0
1
0
1
—
Function
This is a chip test bit. Always write 0 to this bit at writing to
DLCR5. Writing 1 to this bit is prohibited during normal
operation.
Indicates valid data remaining in receiver buffer memory
Indicates no valid data in receiver buffer memory
Not affected
If the received packet has short packet, alignment, and CRC
errors, it is discarded and is not transferred to the receiver
buffer.
A packet with short packet, alignment, and CRC errors is
transferred to the receiver buffer like a normally-received
packet.
Compares destination addresses of receive packet and ID
addresses of node for match at all 6 bytes (48 bits)
Compares destination addresses of received packet and ID
addresses of node for match only at upper byte and 5 bytes
(40 bits)
A packet of more than 60 bytes and less than 2 Kbytes can be
received.
A packet of more than 6 bytes and less than 2 Kbytes can be
received.
The value of this bit is ignored when bit 5 (ACPT BAD PKT) is
set.
The remote reset packet is not detected.
Checks whether value of data length field in receive packet is
0900H
Selects node ID address match detect mode at packet
receiving (Tables 3 and 4)
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