MB3828 View Datasheet(PDF) - Fujitsu

Part Name

Description

View to exact match

MB3828

Pentium® DC/DC Converter IC

Fujitsu 

MB3828

2. Protection Functions

(1) VCC under voltage lockout circuit (UVLO)

Power surges at power-on, or momentary under-voltage situations can cause abnormal operation in the

MB3828, which may lead to damage or deterioration in systems. This circuit prevents abnormal operation

during times of low voltage by using the supply voltage to detect the level of the internal reference voltage, and

fixes output pins OUT1 (pin 8) and OUT2 (pin 11) to “L” level. Once the supply voltage recovers to a level

above the threshold voltage of the under voltage lockout circuit, operation is restored.

(2) Timer-latch short-circuit protection circuit (SCP)

This circuit detects the output voltage level from Error Amp. and activates the timer circuit, charging the external

capacitor from the CSCP pin (pin 22) when Error Amp. output voltage level reaches or exceeds about 2.1 V.

If Error Amp. output does not return to the normal voltage range before the capacitor voltage reaches about

0.68 V, the latch circuit is activated and the output pins (OUT1, OUT2) are held at “L” level. Once the protector

circuit is activated, it can be reset by switching the power supply off and on again.

(3) Overvoltage protection circuit (OVP)

When the DC/DC converter output voltage (VO) exceeds the output voltage set by the VD4 to VD0 pins by

more than +17.5%, the overvoltage protection circuit output signal goes to “H” level causing one output pin

(OUT1) to be held at “L” level and the other output pin (OUT2) to be held at “H” level.

(4) PWRGOOD comparator detection circuit (PWRGD)

The PWRGOOD pin (pin 21) outputs an “H” level signal as long as the VSENSE pin (pin 20) is receiving the

DC/DC converter output voltage (VO) within the range of 0.9 to 1.1 times the output voltage set by the VD4 to

VD0 pins.

3. Soft Start/Discharge Control

(1) Soft start circuit (CS)

Connecting a capacitor to the CS pin (pin 4) prevents the inrush current at power turnon. Using an Error Amp.

for detecting the soft error allows the soft start time to be initiated independent of output load from the DC/DC

converter.

(2) Discharge control ON/OFF circuit (CTL LOGIC)

Entering an “L” level signal at the CTL pin while an “H” level signal is input at the ENB pin causes the discharge

control ON/OFF circuit (CTL LOGIC) to switch the soft start circuit (CS) from charging to discharging.

The resistance (RS) connected to the RS pin (pin 2) charges the soft start capacitor (CS), so that Error Amp.

provides control over the DC/DC converter output voltage in the same way as during a soft start. This makes

it possible to control voltage drop independently of output load.

When the CS pin voltage reaches the discharge control comparator circuit (CS Comp.) threshold voltage

(≅ 50 mV), the discharge control is canceled.

When an “L” level signal is input at the ENB pin (pin 7), the DC/DC converter output voltage discharge time

control is switched OFF.

15

Share Link: