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MAX9880A View Datasheet(PDF) - Maxim Integrated

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MAX9880A Datasheet PDF : 70 Pages
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Low-Power, High-Performance
Dual I2S Stereo Audio Codec
Digital Microphone Input
The MAX9880A can accept audio from up to two digi-
tal microphones. When using digital microphones, the
left analog microphone input is retasked as a digital
microphone input. The right analog microphone input is
still available to allow a combination of analog and digi-
tal microphones to be used. Figure 7 shows the digital
microphone interface timing diagram.
DIGMICCLK
DIGMICDATA
1/fMICCLK
tHD, MIC
tSU, MIC
tHD, MIC
tSU, MIC
LEFT
RIGHT
LEFT
RIGHT
Figure 7. Digital Microphone Timing Diagram
Table 19. Digital Microphone Input Register
REGISTER
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
ADDRESS
(SEE NOTE)
Microphone
MICCLK
DIGMICL DIGMICR
0
0
0
MBIAS
0x23
Grayed boxes = Not used.
Note: Register addresses listed are for I2C. To get the SPI address, add 0x200 with the following exception: Register 0xFF is not
accessible through SPI.
BITS
MICCLK
DIGMICL/
DIGMICR
MBIAS
FUNCTION
Digital Microphone Clock
00 = PCLK/8
01 = PCLK/6
10 = 64fS (high jitter clock)
11 = Reserved
Digital Left/Right Microphone Enable
DIGMICL
DIGMICR
0
0
LEFT ADC INPUT
ADC input mixer
RIGHT ADC INPUT
ADC input mixer
0
1
Line input (left analog
microphone unavailable)
Right digital microphone
1
0
Left digital microphone
ADC input mixer
1
1
Left digital microphone Right digital microphone
Note: The left analog microphone input is never available when DIGMICL or DIGMICR = 1.
Microphone Bias Output Voltage
Set MBIAS = 0 for nominal output of 1.52V (VMICVDD = 1.8V)
Set MBIAS = 1 for nominal output of 2.2V (VMICVDD = 3V)
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