Low-Power, High-Performance
Dual I2S Stereo Audio Codec
Table 3. Status Register Bits
BITS
CLD
SLD
ULK
FUNCTION
Clip Detect Flag. Indicates that a signal has become clipped in the ADC or DAC. To resolve a clip condition in
the signal path, the DAC gain settings and analog input gain settings should be lowered. As the CLD bit does
not indicate where the overload has occurred, identify the source by lowering gains individually.
Slew Level Detect Flag. When volume or gain changes are made, the slewing circuitry smoothly steps through
all intermediate settings. When SLD is set high, all slewing has completed and the volume or gain is at its final
value. SLD is also set when soft start or stop is complete.
Digital PLL Unlock Flag. Indicates that the digital audio PLL has become unlocked and digital signal data is not
reliable.
JDET
Headset Configuration Change Flag. JDET reports changes in JKSNS[1:0]. Changes to JKSNS[1:0] are
debounced before setting JDET. The debounce period is programmable using the JDEB bits.
JKSNS[1:0]
AUX
JKSNS reports the status of the JACKSNS pin when JDETEN = 1. JKSNS is not debounced and should be
interpreted according to the following information.
JKSNS[1:0]
DESCRIPTION
00
JACKSNS is below VTH2.
01
JACKSNS is between VTH1 and VTH2.
10
Invalid.
11
JACKSNS is above VTH1.
Auxiliary Input Measurement. AUX is a 16-bit signed two’s complement number representing the voltage
measured at JACKSNS/AUX. Before reading a value from AUX, set AUXCAP to 1 to ensure a stable reading. After
reading the value, set AUXCAP to 0.
Use the following formula to convert the AUX value into an equivalent JACKSNS/AUX voltage:
Voltage
=
0.738V
AUX
k
k = AUX value when AUXGAIN = 1. See AUXGAIN for details on determining the value of k, the calibration
constant.
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