M36W216TI, M36W216BI
Table 22. SRAM Read AC Characteristics
Symbol
Alt
Parameter
tAVAV
tRC Read Cycle Time
tAVQV
tACC Address Valid to Output Valid
tAXQX
tOH Address Transition to Output Transition
tBHQZ
tBHZ UBS, LBS Disable to Hi-Z Output
tBLQV
tAB
UBS, LBS Access Time
tBLQX
tBLZ UBS, LBS Enable to Low-Z Output
tE1HQZ
tCHZ1 Chip Enable 1 High to Output Hi-Z
tE1LQV
tACS1 Chip Enable 1 Low to Output Valid
tE1LQX
tCLZ1 Chip Enable 1 Low to Output Transition
tE2HQV
tACS2 Chip Enable 2 High to Output Valid
tE2HQX
tCLZ2 Chip Enable 2 High to Output Transition
tE2LQZ
tCHZ2 Chip Enable 2 Low to Output Hi-Z
tGHQZ
tOHZ Output Enable High to Output Hi-Z
tGLQV
tOE Output Enable Low to Output Valid
tGLQX
tOLZ Output Enable Low to Output Transition
tPD (1)
Chip Enable 1 High or Chip Enable 2 Low to Power Down
tPU (1)
Chip Enable 1 Low or Chip Enable 2 High to Power Up
Note: 1. Sampled only. Not 100% tested.
SRAM
Min
Max
70
70
10
25
70
5
25
70
10
70
10
25
25
35
5
70
0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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