LC75742W View Datasheet(PDF) - SANYO -> Panasonic
Part Name
Description
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LC75742W Datasheet PDF : 18 Pages
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LC75742E, LC75742W
Output Pin States during the Reset Period (when BLK is low)
Output pin
S1 to S41
G1, G2
KS1 to KS5
KS6
DO
State during reset
L
L
X *1
H
H *2
Notes: 1. The state of this pin is undefined after power has been applied until the sleep control data (S0 and S1) are transferred.
2. Since this pin is an open-drain output, a pull-up resistor (between 1 and 10 kΩ) is required. It remains high during the reset period even if the
controller attempts to read the key data.
Sample Application Circuit
From the controller
To the controller
To the controlle
power supply
Key matrix with
up to 30 keys
Note *: Since DO is an open-drain output, a pull-up resistor is required. Select a value in the range 1 to 10 kΩ that is most appropriate for the capacitance
of the external lines so that the waveform is not distorted.
Notes on the Segment and Digit Waveforms
Segment waveform
Digit waveform 1
Digit waveform 2
Figure 6
The segment waveform is somewhat deformed due to the VFD panel itself and the circuit wiring. Furthermore, if a digit
waveform such as digit waveform 1 in which no dimming is applied is used, the display will glow dimly. Therefore,
applications must take this waveform deformation into account and apply adequate dimming such as that shown in digit
waveform 2 so that this phenomenon does not occur.
No. 6142-15/18
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