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M27128A-3F1 View Datasheet(PDF) - STMicroelectronics

Part NameDescriptionManufacturer
M27128A-3F1 NMOS 128K (16K x 8) UV EPROM ST-Microelectronics
STMicroelectronics ST-Microelectronics
M27128A-3F1 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
M27128A
DEVICE OPERATION (cont’d)
For the most efficient use of these two control lines,
E should be decoded and used as the primary
device selecting function, while G should be made
a common connection to all devices in the array
and connected to the READ line from the system
control bus.
This ensures that all deselected memory devices
are in their low power standby mode and that the
output pins are only active when data is required
from a particular memory device.
System Considerations
The power switching characteristics of fast
EPROMs require careful decoupling of the devices.
The supply current, ICC, has three segments that
are of interest to the system designer: the standby
current level, the active current level, and transient
current peaks that are produced by the falling and
rising edges of E. The magnitude of this transient
current peaks is dependent on the capacitive and
inductive loading of the device at the output. The
associated transient voltage peaks can be sup-
pressed by complying with the two line output
control and by properly selected decoupling ca-
pacitors. It is recommended that a 1µF ceramic
capacitor be used on every device between VCC
and VSS. This should be a high frequency capacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7µF bulk electrolytic capacitor should be used
between VCC and GND for every eight devices. The
bulk capacitor should be located near the power
supply connection point. The purpose of the bulk
capacitor is to overcome the voltage drop caused
by the inductive effects of PCB traces.
Programming
When delivered (and after each erasure for UV
EPPROM), all bits of the M27128A are in the “1"
state. Data is introduced by selectively program-
ming ”0s" into the desired bit locations. Although
only “0s” will be programmed, both “1s” and “0s”
can be present in the data word. The only way to
change a “0" to a ”1" is by ultraviolet light erasure.
The M27128A is in the programming mode when
VPP input is at 12.5V and E and P are at TTL low.
The data to be programmed is applied 8 bits in
parallel, to the data output pins. The levels required
for the address and data inputs are TTL.
Fast Programming Algorithm
Fast Programming Algorithm rapidly programs
M27128A EPROMs using an efficient and reliable
method suited to the production programming en-
vironment. Programming reliability is also ensured
as the incremental program margin of each byte is
Table 3. Operating Modes
Mode
E
Read
VIL
Output Disable
VIL
Program
VIL
Verify
VIL
Program Inhibit
VIH
Standby
VIH
Electronic Signature
VIL
Note: X = VIH or VIL, VID = 12V ± 0.5%.
G
P
A9
VIL
VIH
X
VIH
VIH
X
VIH
VIL Pulse
X
VIL
VIH
X
X
X
X
X
X
X
VIL
VIH
VID
VPP
Q0 - Q7
VCC
Data Out
VCC
Hi-Z
VPP
Data In
VPP
Data Out
VPP
Hi-Z
VCC
Hi-Z
VCC
Codes Out
Table 4. Electronic Signature
Identifier
A0
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0 Hex Data
Manufacturer’s Code VIL
0
0
1
0
0
0
0
0
20h
Device Code
VIH
1
0
0
0
1
0
0
1
89h
3/10
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