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M24C16-F View Datasheet(PDF) - STMicroelectronics

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Description
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M24C16-F
ST-Microelectronics
STMicroelectronics ST-Microelectronics
M24C16-F Datasheet PDF : 39 Pages
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M24C16-W M24C16-R M24C16-F
DC and AC parameters
Table 16. 400 kHz AC characteristics
Symbol
Alt.
Parameter
Min. Max. Unit
fC
fSCL Clock frequency
-
400
kHz
tCHCL
tHIGH Clock pulse width high
600
-
ns
tCLCH
tQL1QL2(1)
tXH1XH2
tXL1XL2
tLOW
tF
tR
tF
Clock pulse width low
SDA (out) fall time
Input signal rise time
Input signal fall time
1300
-
ns
20(2)
300
ns
(3)
(3)
ns
(3)
(3)
ns
tDXCH
tSU:DAT Data in set up time
100
-
ns
tCLDX
tCLQX(4)
tCLQV(5)
tHD:DAT
tDH
tAA
Data in hold time
Data out hold time
Clock low to next data valid (access time)
0
-
ns
100
-
ns
-
900
ns
tCHDL
tSU:STA Start condition setup time
600
-
ns
tDLCL
tHD:STA Start condition hold time
600
-
ns
tCHDH tSU:STO Stop condition set up time
600
-
ns
tDHDL
tBUF
Time between Stop condition and next Start
condition
1300
-
ns
tW
tNS(1)
tWR Write time
-
Pulse width ignored (input filter on SCL and
SDA) - single glitch
-
5
ms
-
100
ns
1. Characterized only, not tested in production.
2. With CL = 10 pF.
3. There is no min. or max. values for the input signal rise and fall times. It is however recommended by the
I²C specification that the input signal rise and fall times be more than 20 ns and less than 300 ns when
fC < 400 kHz.
4.
TunhdeemfininedvarleugeiofonrotCf tLhQeXf(aDlliantga
out hold time)
edge SCL.
of
the
M24xxx
devices
offers
a
safe
timing
to
bridge
the
5.
t0C.7LQVVCiCs,thaesstuimmein(gfrothmatthRebufas l×linCgbeuds gtiemoefcSoCnsLt)arnetqiusirweidthbiny
the
the
SDA bus line to
values specified
reach either 0.3
in Figure 12.
VCC
or
DocID023494 Rev 6
27/39
38
 

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