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ST92124DR1TC View Datasheet(PDF) - STMicroelectronics

Part Name
Description
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ST92124DR1TC Datasheet PDF : 429 Pages
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ST92F124/F150/F250 - GENERAL DESCRIPTION
Port
Name
P8.0
P8.1
P8.2
P8.3
P8.4
P8.5
P8.6
P8.7
P9.0
P9.1
P9.2
P9.3
P9.4
P9.5
P9.6
P9.7
Pin No.
LQFP64 PQFP100 LQFP100
AIN0
-
74
71
WKUP14
AIN1
-
75
72
WKUP15
-
76
73 AIN2
-
77
74 AIN3
-
78
75 AIN4
-
79
76 AIN5
-
80
77 AIN6
-
81
78 AIN7
-
98
95
RDI2)
-
99
96
TDO2)
-
100
97 A16
A17 3)
-
1
98
SDA12)
A18 3)
-
2
99
SCL12)
-
3
100 A19
-
4
1
A20
-
5
2
A21
Alternate Functions
I Analog Data Input 0
I Wake-up Line 14
I Analog Data Input 1
I Wake-up Line 15
I Analog Data Input 2
I Analog Data Input 3
I Analog Data Input 4
I Analog Data Input 5
I Analog Data Input 6
I Analog Data Input 7
I SCI-A Receive Data Input
O SCI-A Transmit Data Output
O Address bit 16
O Address bit 17
I/O I²C 1 Data
O Address bit 18
I/O I²C 1 Clock
O Address bit 19
O Address bit 20
O Address bit 21
Note1: The ST92F150-EMU2 emulator does not
emulate ADC channels from AIN0 to AIN7 and ex-
tended function timers because they are not imple-
mented on the emulator chip. See also Section
13.8 on page 423.
Note 2: Available on some devices only.
Note 3: For the ST92F250 device, since A[18:17]
share the same pins as SDA1 and SCL1 of I²C_1,
these address bits are not available when the
I²C_1 is in use (when I2CCR.PE bit is set).
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