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ADC08061CIN View Datasheet(PDF) - National ->Texas Instruments

Part NameDescriptionManufacturer
ADC08061CIN 500 ns A/D Converter with S/H Function and Input Multiplexer National-Semiconductor
National ->Texas Instruments National-Semiconductor
ADC08061CIN Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
Application Information (Continued)
External Reference 2.5V Full-Scale
(Standard Application)
Power Supply as Reference
Input Not Referred to GND
DS011086-20
Note : Bypass capacitors consist of a 0.1 µF
ceramic in parallel with a 10 µF bead tantalum.
DS011086-21
FIGURE 8. Analog Input Options
DS011086-22
* Signal source driving VIN(−) must be capable
of sinking 5 mA.
DS011086-23
Note the multiple bypass capacitors on the reference and power supply pins. VREF− should be bypass to analog ground using multiple capacitors if it is not
grounded (see Section 7.0 “Layout, Grounds, and Bypassing”). VIN1 is shown with an optional input protection network.
FIGURE 9. Typical Connection
The ADC08061 can perform accurate conversions of
full-scale input signals at frequencies from dc to more than
300 kHz (full power bandwidth) without the need of an exter-
nal sample-and-hold (S/H).
7.0 LAYOUT, GROUNDS, AND BYPASSING
In order to ensure fast, accurate conversions from the
ADC08061/2, it is necessary to use appropriate circuit board
layout techniques. Ideally, the analog-to-digital converter’s
ground reference should be low impedance and free of noise
from other parts of the system. Digital circuits can produce a
great deal of noise on their ground returns and, therefore,
should have their own separate ground lines. Best perfor-
mance is obtained using separate ground planes for the digi-
tal and analog parts of the system.
The analog inputs should be isolated from noisy signal
traces to avoid having spurious signals couple to the input.
Any external component (e.g., an input filter capacitor) con-
nected across the inputs should be returned to a very clean
ground point. Incorrectly grounding the ADC08061/2 will re-
sult in reduced conversion accuracy.
The V+ supply pin, VREF+, and VREF− (if not grounded)
should be bypassed with a parallel combination of a 0.1 µF
ceramic capacitor and a 10 µF tantalum capacitor placed as
close as possible to the supply pin using short circuit board
traces. See Figures 8, 9.
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