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LC78835 View Datasheet(PDF) - SANYO -> Panasonic

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LC78835 Datasheet PDF : 14 Pages
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LC78835K, 78835KM
2. Initialization
Initialization is necessary when power is applied or the system clock is replaced. When the INITB pin has been set
to an “L” level, the supply to XIN, BCLK, and LRCK should be connected only after the supply has stabilized at the
“L” level. As shown in the figure, a period greater than one LRCK cycle is required.
When INITB = “L,” all 18-bit digital filter outputs set to 0, and the D/A converter’s output (CH1OUT, CH2OUT)
equals 0 analog output (approximately (VREFH + VREFL)/2 electric potential).
3. System Clock
This IC supports four system clock speeds including 384 fs, 392 fs, 448 fs, and 512 fs. These may be selected using
the CKSL1 and CKSL2 pins.
CKSL1
L
L
H
H
CKSL2
L
H
L
H
System Clock
384 fs
392 fs
448 fs
512 fs
• CKOUT Pin
When operating at 392 fs, clock output is 196 fs or half that of the system clock. All other speeds result in clock
output equal to that of the system.
No. 4624-8/14
 

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