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LC74411NE View Datasheet(PDF) - SANYO -> Panasonic

Part Name
Description
View to exact match
LC74411NE
SANYO
SANYO -> Panasonic SANYO
LC74411NE Datasheet PDF : 14 Pages
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LC74411N, LC74411NE
Sub-Screen Digital Processing Specifications
Item
Order
NTSC (fH = 15734Hz)
PAL (fH = 15625Hz)
Y, R–Y, Y, B–Y, Y, –, Y, –, ······
Frequency
fT (MHz)
Y only
A/D converter sampling
fTY
R-Y only
fTR
B-Y only
fTB
Number of bits in quantization
7.552
3.776
0.944
0.944
480 fH
240 fH
60 fH
60 fH
6 bits
7.500
3.750
0.938
0.938
D/A converter clock
(MHz)*1
Y signal
fCY
R-Y signal
fCR
B-Y signal
fCB
Number of horizontal bits
11.58
2.895
2.895
736 fH
184 fH
184 fH
288
11.50
2.875
2.875
Y only
192
Write
R-Y only
48
B-Y only
48
Number of vertical lines
73
85
Number of horizontal bits
268
Y only
180
Readout display*2
R-Y only
44
B-Y only
44
Number of vertical lines
72
84
Note: 1. When the PLL divisor has its standard value (PLL4:0 = 10110).
2. Target values are shown. (The number of horizontal bits varies with, for example, the frame width adjustment.)
Initialization
(1) RES pin: Reset
The RES pin must be held low when power is first applied with the timing shown in the figure.
(2) Internal control registers
After a reset, the chip goes to the standby state (SBY = high). When developing the microcontroller software, that
software must be designed so that it transmits data for all registers. Also note that data values of zero (0) must be sent
for the control registers that have ‘0’ entries in the control register table.
No. 5519-11/14
 

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