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LB11690 View Datasheet(PDF) - SANYO -> Panasonic

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LB11690 Datasheet PDF : 19 Pages
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LB11690, 11690H
LB11690/LB11690H Function Description
1. Output Drive Circuit
This IC was designed assuming that n-channel FETs would be used in both the low and high side output circuits.
Direct PWM drive was adopted as the drive method to minimize power loss in the outputs. The output transistors are
always saturated when on, and the motor drive power is adjusted by changing the output on duty. The output PWM
switching is performed on the low side output circuits connected to the UL, VL, and WL pins. Since the reverse
recovery time for the diodes built into the high side (the non-PWM side) output FETs can become a problem, the
devices used must be selected carefully. (If diodes with a short reverse recovery time are not used, through currents
may flow at the instant the PWM side transistors turn on.)
Capacitors (about 0.1 µF) must be inserted close to the output
For oscillation prevention
FETs for each of the three phases to prevent high-frequency
oscillator due to the PCB pattern.
If the FET switching speed is too fast and leads to problems,
UH pin
To VCC
adjust the speed by inserting a series resistor in the gate line. If UOUT pin
the low side (PWM side) FET on speed is too fast, through
To the motor coil
currents may flow. However if too large a resistance is inserted
UL pin
in the gate line, the gate waveform may become less sharp.
When the PWM on duty is low, the gate voltage may be
insufficient. This can lead to excessive heating or even
For through current
prevention
To RF
destruction of the low side FET. Even if a resistor is not
inserted, a similar phenomenon may occur if the FET gate capacitance is relatively large. In such cases, the lowest
duty used must be limited, taking the ASO of the switching device used into consideration.
Depending on the FET devices used, through currents may flow when the PWN on duty is low. One workaround for
this problem is to insert capacitors between the gate and source of the high side FETs. However, if the capacitor
values are too high, switching may become too slow, resulting in excessive heating in the high side FETs.
2. Current Limiter Circuit
The current limiter circuit limits the (peak) current at a current determined by the equation I = VRF/Rf (where VRF is
0.1 V (typical) and Rf is the value of the current detection resistor). The current limiter operates by reducing the
output on duty, thus reducing the output current. This circuit can be operated at a precise current limit value by
connecting both ends of the current detection resistor as close as possible to the RF and RFGND pins.
If a current detection resistor with an extremely small value is
used, the PCB pattern must be designed so that the wiring
resistance components for each phase are as close to identical
RF pin
3 k
as possible. If there are differences in the wiring resistance
components between the phases, the current limit value will
change each time the phase changes. This can lead to motor
1 k
RFGND pin
Current detection
resistor
vibration and motor noise.
While the reference voltage is set to 0.1 V to minimize power
loss in the current detection resistor, it may be desirable to use
a larger current detection resistor value in some applications.
In such cases, a resistor divided voltage must be input to the
RF pin. If the resistor ratio shown in the figure is used, a
RF pin
RFGND pin
Current detection
resistor
current detection resistor about 4 times larger can be used.
The current limiter circuit includes a built-in filter circuit so
that the current limiter circuit does not operate incorrectly due to detecting the output diode reverse recovery current
due to PWM operation. In most applications, the built-in filter circuit will function without problem. If problems due
occur (if the diode reverse recovery current flows for more than 1 µs), add an external filter circuit such as a low-pass
RC filter. However, be careful not to insert excessive delay, as that will delay detection by the current limiter circuit.
No. 7543-12/19
 

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