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TDA8138 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
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TDA8138 Datasheet PDF : 6 Pages
1 2 3 4 5 6
TDA8138
ELECTRICAL CHRACTERISTICS (VIN1 = 7V, VIN2 = 14V, Tj = 25oC, unless otherwise specified)
Symbol
VO1
VO2
VO1
VO2
Parameter
Output Voltage
Output Voltage
Output Voltage
Output Voltage
Test Conditions
IO1 = 10mA
IO2 = 10mA
7V < VIN1 < 14V
14 < VIN2 < 18V
5mA < IO1,2 < 750mA
Min. Typ. Max. Unit
5
5.1
5.2
V
11.76 12 12.24 V
4.9
5.3
V
11.5
12.5
V
VIO1,2 Dropout Voltage
VO1,2LI Line Regulation
VO1,2LO Load Regulation
IQ
Quiescent Current
VO1RST Reset Thrseshold Voltage
VRTH
tRD
Reset Thrseshold Hysteresis
Reset Pulse Delay
VRL
IRH
KO1,2
Saturation Voltage in Reset Condition
Leakage Current in Normal Condition
(at Pin 6 for SIP9 or Pin 5 for Heptawatt)
Output Voltage Thermal Drift
IO1,2SC Short Circuit Output Current
VDISH
VDISL
IDIS
Tjsd
Disable Voltage High (out 2 active)
Disable Voltage Low (out 2 disabled)
Disable Bias Current
Junction Temperature for Thermal Shut
Down
IO1,2 = 750mA
IO1,2 = 1A
7V < VIN1 < 14V
14 < VIN2 < 18V
IO1,2 = 200mA
5mA < IO1 < 0.6A
5mA < IO2 < 0.6A
IO1 = 10mA
Output 2 Disabled
K = VO1
See circuit description
Ce = 100nF
See circuit description
I5 = 5mA
V5 = 10V
Tj = 0 to 125oC
KO
=
VO 106
T VO
VIN1 = 7V, VIN2 = 14V
VIN1,2 = 16V (see Note)
0V < VDIS < 7V
1.4
V
2
V
50
mV
120 mV
100 mV
250 mV
2
mA
K - 0.4 K - K - 0.1 V
0.25
20
50
75
mV
25
ms
0.4
V
10
µA
100
ppm/oC
1.6
A
1
A
2
V
0.8
V
-100
2
µA
145
oC
Note : Safe permanent short-circuit is only guaranteed for input voltages up to 16V.
CIRCUIT DESCRIPTION
The TDA8138 is a dual voltage regulator with Reset
and Disable (TD8138A : Disable only, TDA8138B :
Reset only).
The two regulation parts are supplied from one
voltage reference circuit trimmed by zener zap
during EWS test.
Since the supply voltage of this last is connected at
Pin 1 (VIN1), the regulator 2 will not work if Pin 1 is
not supplied.
The outputs stage have been realized in darlington
configuration with a drop typical 1.2V.
The disable circuit, switch-off the output 2 if a
voltage lower than 0.8V is applied at Pin 3
(Heptawatt) or Pin 4 (SIP9)
The Reset circuit checks the voltage at the out-
put 1. If this one goes below VOUT - 0.25V (4.85V
typ.), the comparator "a" (see Figure 1) discharges
rapidly the capacitor Ce and the reset output goes
at once Low. When the voltage at the out1 rises
above VOUT - 0.2V (4.9V typ.), the voltage VCe
increases linearly to 2.5V corresponding to a delay
td following the law :
t1 =
Ce 2.5V
10µA
(see Figure 2),
then the reset output goes high again. To avoid
gliches in the reset output, the second comparator
"b" has a large hysteresis (1.9V).
3/6
 

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