datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

K9F2G08R0A View Datasheet(PDF) - Samsung

Part Name
Description
View to exact match
K9F2G08R0A Datasheet PDF : 44 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
K9F2G08R0A
K9F2G08U0A
FLASH MEMORY
Program / Erase Characteristics
Parameter
Program Time
Dummy Busy Time for Two-Plane Page Program
Number of Partial Program Cycles
Symbol
Min
Typ
Max
Unit
tPROG
-
200
700
µs
tDBSY
-
0.5
1
µs
Nop
-
-
4
cycles
Block Erase Time
tBERS
-
1.5
2
ms
NOTE : 1. Typical value is measured at Vcc=3.3V, TA=25°C. Not 100% tested.
2. Typical program time is defined as the time within which more than 50% of the whole pages are programmed at 3.3V Vcc and 25°C temperature.
AC Timing Characteristics for Command / Address / Data Input
Parameter
Symbol
Min
1.8V
3.3V
Max
1.8V
3.3V
CLE Setup Time
CLE Hold Time
CE Setup Time
CE Hold Time
WE Pulse Width
ALE Setup Time
ALE Hold Time
Data Setup Time
Data Hold Time
Write Cycle Time
WE High Hold Time
Address to Data Loading Time
tCLS(1)
21
12
-
-
tCLH
5
5
-
-
tCS(1)
25
20
-
-
tCH
5
5
-
-
tWP
21
12
-
-
tALS(1)
21
12
-
-
tALH
5
5
-
-
tDS(1)
20
12
-
-
tDH
5
5
-
-
tWC
42
25
-
-
tWH
15
10
-
-
tADL(2)
100
100
-
-
NOTES : 1. The transition of the corresponding control pins must occur only once while WE is held low
2. tADL is the time from the WE rising edge of final address cycle to the WE rising edge of first data cycle
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
13
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]