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KM416L8031BT-GLZ View Datasheet(PDF) - Samsung

Part Name
Description
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KM416L8031BT-GLZ
Samsung
Samsung Samsung
KM416L8031BT-GLZ Datasheet PDF : 53 Pages
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128Mb DDR SDRAM
4. Command Truth Table
COMMAND
CKEn-1 CKEn CS RAS CAS WE BA0,1 A10/AP
A11,
A9 ~ A0
Note
Register
Extended MRS
H
X
LL
L
L
OP CODE
1, 2
Register
Mode Register Set
H
X
LL
L
L
OP CODE
1, 2
Auto Refresh
H
3
H
LL
LH
X
Entry
L
3
Refresh
Self
Refresh
Exit
L
H
H
H
L
H
X
3
HX
XX
3
Bank Active & Row Addr.
H
X
LL
HHV
Row Address
Read &
Auto Precharge Disable
Column Address Auto Precharge Enable
H
L
Column
4
X
LH
L HV
Address
H
(A0~A9)
4
Write &
Auto Precharge Disable
Column Address Auto Precharge Enable
H
L
Column
4
X
LH
L
LV
Address
H
(A0~A9)
4, 6
Burst Stop
H
X
LH
HL
X
7
Precharge
Bank Selection
All Banks
V
L
H
X
LL
HL
X
H
X
5
HX
XX
Entry
H
L
Active Power Down
LV
VV
X
Exit
L
H
XX
XX
HX
XX
Entry
H
L
L
H
H
H
Precharge Power Down Mode
X
HX
XX
Exit
L
H
LV
VV
DM
H
X
X
8
No operation (NOP) : Not defined
HX
H
X
LH
Table 8. Command truth table
XX
9
X
HH
9
(V=Valid, X=Dont Care, H=Logic High, L=Logic Low)
1. OP Code : Operand Code. A0 ~ A11 & BA0 ~ BA1 : Program keys. (@EMRS/MRS)
2.EMRS/ MRS can be issued only at all banks precharge state.
A new command can be issued 2 clock cycles after EMRS or MRS.
3. Auto refresh functions are same as the CBR refresh of DRAM.
The automatical precharge without row precharge command is meant by "Auto".
Auto/self refresh can be issued only at all banks precharge state.
4. BA0 ~ BA1 : Bank select addresses.
If both BA0 and BA1 are "Low" at read, write, row active and precharge, bank A is selected.
If both BA0 is "High" and BA1 is "Low" at read, write, row active and precharge, bank B is selected.
If both BA0 is "Low" and BA1 is "High" at read, write, row active and precharge, bank C is selected.
If both BA0 and BA1 are "High" at read, write, row active and precharge, bank D is selected.
5. If A10/AP is "High" at row precharge, BA0 and BA1 are ignored and all banks are selected.
6. During burst write with auto precharge, new read/write command can not be issued.
Another bank read/write command can be issued after the end of burst.
New row active of the associated bank can be issued at tRP after the end of burst.
7. Burst stop command is valid at every burst length.
8. DM sampled at the rising and falling edges of the DQS and Data-in are masked at the both edges (Write DM latency is 0).
9. This combination is not defined for any function, which means "No Operation(NOP)" in DDR SDRAM.
- 33 -
REV. 1.0 November. 2. 2000
 

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