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ISL97635A View Datasheet(PDF) - Intersil

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Description
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ISL97635A
Intersil
Intersil Intersil
ISL97635A Datasheet PDF : 28 Pages
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ISL97635A
Electrical Specifications
All specifications below are tested at TA = -40°C to +85°C; VIN = 12V, EN = 5V, RSET = 36.6kΩ, unless
otherwise noted. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise
specified. Temperature limits established by characterization and are not production tested. (Continued)
PARAMETER
DESCRIPTION
CONDITION
MIN TYP MAX UNIT
tSU:DAT
Data Setup Time
tLOW
Clock Low Period
tHIGH
Clock High Period
tF
Clock/Data Fall Time
tR
Clock/Data Rise Time
GENERAL TIMING SPECIFICATIONS (Note 4)
250
ns
4.7
µs
4.0
50 µs
300 ns
1000 ns
t1
Minimum Setup Time Between VIN Rising above EN = 1, TA = +25°C, VDC capacitor < 10µF
80
µs
VUVLO with EN = 1 and SMBus Communications
t2
Minimum Setup Time Between EN Going High with VIN > VUVLO, TA= +25°C,
VIN above VUVLO and SMBus Communications
VDC capacitor < 10µF
t3
Minimum Time Between VIN Rising above VUVLO EN = 1, TA = +25°C
with EN = 1 to SMBus BL CTRL On
80
µs
4.5
ms
t4
Minimum Time Between EN Going High with VIN VIN > VUVLO, TA = +25°C
above VUVLO to SMBus BL CTRL On
4.5
ms
t5
Minimum Time for LED Output to Respond to SMBus VIN > VUVLO, EN = 1, TA = +25°C
5
µs
Data at any Levels
t6
Response Time Between Backlight CTRL Off with VIN > VUVLO, EN = 1, TA = +25°C
5
µs
Boost Not Switching to Backlight CTRL On with
Boost Switching
t7
Response Time Between Backlight CTRL On with VIN > VUVLO, EN = 1, TA = +25°C
5
µs
Boost Switching to Backlight CTRL Off with Boost
Not Switching
t8
LED Channel Short Circuit Fault Detection to Status VIN > VUVLO, EN = 1, TA = +25°C, LEDs
6
ms
Register Data Ready
Active
t9
VOUT-GND Short Circuit Detection During Operation VIN > VUVLO, EN = 1, TA = +25°C, Fault
5
µs
to Status Register Data Ready
FET used
t10
Time Between VIN Rising Above VUVLO with
EN = 1, VDC capacitor < 10µF, TA = +25°C,
30
ms
EN = 1 and VOUT-GND Short being Reported in
Fault FET used.
Status Register
t11
Time Between EN Going High with VIN Above
VIN > VUVLO, VDC capacitor < 10µF,
30
ms
VUVLO and a VOUT-GND Short being Reported in TA = +25°C, Fault FET used.
Status Register
CURRENT SOURCES
Vheadroom
Dominant Channel Current Source Headroom at IIN ILED = 20mA, TA = +25°C
Pin
100
mV
VRSET
Voltage at RSET Pin
ILEDmax
Maximum LED Current Per Channel
PWM GENERATOR (Note 4)
RSET = 36.6kΩ
RSET = 20.9kΩ
680 700 720 mV
35
mA
FPWM
DPWM
Generated PWM Frequency
Duty Cycle of Generated PWM (DC-to-PWM)
tMAX_PWM_OFF
Maximum PWMI Off-Time Before Shutdown
CFPWM = 27nF, CPWMO = 220nF
VPWMO = 0.3V CFPWM = 27nF
VPWMO = 1.1V CFPWM = 27nF
EN/PWMI toggles
200
Hz
90
%
10
%
28
ms
6
FN6564.2
December 22, 2008
 

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