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ISL95820EVAL1Z View Datasheet(PDF) - Intersil

Part Name
Description
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ISL95820EVAL1Z Datasheet PDF : 47 Pages
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ISL95820
Pin Descriptions (Continued)
PIN #
SYMBOL
DESCRIPTION
26
LGATE2 Output of Phase 2 low-side MOSFET gate driver. Connect the LGATE2 pin to the gate of Phase 2 low-side MOSFET.
27
LGATE3 Output of Phase 3 low-side MOSFET gate driver. Connect the LGATE3 pin to the gate of Phase 3 low-side MOSFET.
28
PHASE3 Current return path for Phase 3 high-side MOSFET gate driver. Connect the PHASE3 pin to the node consisting of the
high-side MOSFET source, the low-side MOSFET drain, and the output inductor of Phase 3.
29
UGATE3 Output of Phase 3 high-side MOSFET gate driver. Connect the UGATE3 pin to the gate of Phase 3 high-side MOSFET.
30
BOOT3 Phase 3 internal gate driver high-side MOSFET bootstrap capacitor connection. Connect an MLCC capacitor between the
BOOT3 and the PHASE3 pins. The boot capacitor is charged through an internal boot diode connected from the VCCP pin
to the BOOT3 pin, each time the PHASE3 pin drops below VCCP minus the voltage dropped across the internal boot diode.
31
PWM4 PWM output for Phase 4. Phase 4 requires an external gate driver device. The Intersil ISL6625A driver is recommended.
32
VIN
Input supply voltage, used for feed-forward. Connect this pin to the input voltage of the output drive stages.
33
PROG3 A resistor from the PROG3 pin to GND programs the internal modulator slope compensation and switching frequency.
34
PROG2 A resistor from the PROG2 pin to GND programs the initial power-up voltage (VBOOT), enables/disables the DC loadline
(droop) function, and enables/disables diode emulation mode (DEM) in Power States 2 and 3 (PS2 and PS3).
35
36, 37
PROG1
A resistor from PROG1 pin to GND programs IMAX, the designed nominal maximum load current of the VR. The value of
IMAX establishes the scaling of the reported VR output current, which can be read via the SVID or PMBus interfaces. The
PROG1 resistor is chosen such that the reported IMAX current is FFh when the output current is equal to the maximum
load current.
I2DATA, I2CLK Interface of SMBus/PMBus/I2C. Tie to VCC with 4.7kΩ pull-up resistor when not used.
38, 39, 40
SDA,
SVID communication bus between the CPU and the VR.
ALERT#, SCLK,
5
FN8318.0
February 4, 2013
 

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