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ISL80083IIZ-T View Datasheet(PDF) - Intersil

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ISL80083IIZ-T Datasheet PDF : 21 Pages
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ISL80083
Electrical Specifications Unless otherwise noted, all parameter limits are guaranteed over the recommended operating conditions and
the typical specifications are measured at the following conditions: TA = +25°C, VIN_HOST or VIN_REMOTE = 3.3V. For LDO, VSELECT = VOLDO + 0.5V to
5.5V, L1 = 1.0µH, C1 = C4 = C5 = 10µF, C2 = C3 = C6 = 1µF, IOUT = 0A for SMPS and LDO (see Figure 1 for more details). Boldface limits apply across
the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 6) TYP (Note 6) UNIT
SS Time
VOUT Rise Time
1
ms
Soft-Discharge Resistor
Resistor from PHASE to PGND
115
1VAUX
P-Channel MOSFET ON-resistance
Shutdown Delay Time
Q7
IO = 200mA
Sleep Mode From OSC_EN < 0.45V
0.07
1.5
ms
LDOs
Internal Peak Current Limit
200 425 540 mA
VOLDO Output Start-Up Voltage
VSELECT = 3.3V
1.71 1.80 1.89
V
V3CLAMP Output Voltage
VOLDO Power Supply Rejection Ratio
VOLDO Output Voltage Noise
I3P3V = 15mA, VSELECT = 3.3V
IO = 300mA @ 1kHz, VSELECT = 3.3V, VO = 2.6V,
TA = +25°C
VSELECT = 3.3V, IO = 10mA, TA = +25°C, BW = 10Hz to
100kHz
2.7 3.0 3.3
V
55
dB
45
µVRMS
LEVEL SHFT
CFG2_CR Logic High Input
1.4
V
CFG2_CR Logic Low Input
0.4
V
LSRX_CR Logic High Input
UART_EN > 1.2V
1.4
V
LSRX_CR Logic Low Input
UART_EN > 1.2V
0.4
V
CFG2 Logic High Output
CFG2_CR > 1.2V, 3.3kΩ Pull-down
2.8
3.3
V
CFG2 Logic Low Output
CFG2_CR < 0.4V, 3.3kΩ Pull-down
0.4
V
LSRX Logic High Output
UART_EN > 1.2V, LSRX_CR > 1.2V, 1MΩ Pull-down
2.4
3.2
V
LSRX Logic Low Output
UART_EN > 1.2V, LSRX_CR < 0.4V, 1MkΩ Pull-down
0.4
V
CFG2 Low-to-High Prop Delay
CFG2_CR > 1.2V
50
ns
CFG2 High-to-Low Prop Delay
CFG2_CR < 0.4V
50
ns
LSRX Low-to-High Prop Delay
UART_EN > 1.2V, LSRX_CR > 1.2V
50
ns
LSRX High-to-Low Prop Delay
UART_EN > 1.2V, LSRX_CR < 0.4V
50
ns
LSRX Output Impedance
High Z UART_EN < 0.6V
10
M
OSCILLATOR
CLK2P3OUT Voltage
Output Voltage
Output Voltage
Frequency
I2P2V = 15mA, VSELECT = 2.8V to 5.5V
VOH Single-ended (+OSCOUT or -OSCOUT)
VOL Single-ended (+OSCOUT or -OSCOUT)
Measured from +OSCOUT to -OSCOUT, VSELECT = 3.3V
2.25 2.30 2.35
V
700
mV
100 mV
33.00
MHz
Jitter
Measured from +OSCOUT to -OSCOUT, VSELECT = 3.3V
6
ps
RMS/
Cycle
CLK_OSC Disable Time - Sleep Mode
Delay from OSC_EN < 0.45V
1
ms
CLK_OSC Start Time From Sleep
From CLK_EN > 1.2V
100
µs
6
FN7886.1
May 15, 2013
 

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