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ISL71090SEH12 View Datasheet(PDF) - Intersil

Part Name
Description
View to exact match
ISL71090SEH12 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
ISL71090SEH12
Ordering Information
ORDERING NUMBER
(Notes 1, 2, 3)
PART
NUMBER
VOUT OPTION
(V)
TEMP RANGE
(°C)
PACKAGE
TAPE & REEL
(Pb-Free)
PKG. DWG. #
5962R1321101VXC
ISL71090SEHVF12
1.25
-55 to +125 8 Ld Flatpack
K8.A
ISL71090SEHF12/PROTO
ISL71090SEHF12/PROTO
1.25
-55 to +125 8 Ld Flatpack
K8.A
ISL71090SEHF12EVAL1Z
Evaluation Board
NOTES:
1. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations.
2. For Moisture Sensitivity Level (MSL), please see device information page for ISL71090SEH12. For more information on MSL please see tech brief
TB363
3. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD numbers listed in this
“Ordering Information” table must be used when ordering.
Pin Configuration
DNC
VIN
COMP
GND
ISL71090SEH12
(8 LD FLATPACK)
TOP VIEW
1
8
2
7
3
6
4
5
DNC
DNC
VOUT
TRIM
Pin Descriptions
PIN NUMBER
1, 7, 8
2
3
4
5
6
PIN NAME
DNC
VIN
COMP
GND
TRIM
VOUT
VDD
ESD CIRCUIT
3
1
2
1
2
2
DESCRIPTION
Do not Connect. Internally terminated.
Input Voltage Connection
Compensation and Noise Reduction Capacitor
Ground Connection. Also connected to the lid.
Voltage Reference Trim input
Voltage Reference Output
VDD
VDD
CAPACITIVELY
PIN
TRIGGERED CLAMP
GND
ESD CIRCUIT 1
GND
ESD CIRCUIT 2
DNC
ESD CIRCUIT 3
2
FN8452.0
June 26, 2013
 

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