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ISL6568IRZA View Datasheet(PDF) - Intersil

Part Name
Description
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ISL6568IRZA Datasheet PDF : 29 Pages
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Timing Diagram
tPDHUGATE
UGATE
LGATE
tFLGATE
ISL6568
tRUGATE
tFUGATE
tPDHLGATE
Simplified Power System Diagram
+12VIN
+5VIN
5-6
VID
DAC
ISL6568
Q1
CHANNEL1
Q2
Q3
CHANNEL2
Q4
tRLGATE
VOUT
Functional Pin Description
VCC
VCC is the bias supply for the ICs small-signal circuitry.
Connect this pin to a +5V supply and locally decouple using
a quality 1.0µF ceramic capacitor.
PVCC
This pin is the power supply pin for the MOSFET drivers.
This pin can be connected to any voltage from +5V to +12V,
depending on the desired MOSFET gate drive level.
GND
GND is the bias and reference ground for the IC.
ENLL
This pin is a threshold-sensitive (approximately 0.66V) enable
input for the controller. Held low, this pin disables controller
operation. Pulled high, the pin enables the controller for
operation. ENLL has a internal 1.0µA pull-up to 5V.
8
FS
A resistor, placed from FS to ground, will set the switching
frequency. Refer to Equation 34 for proper resistor
calculation.
VID4, VID3, VID2, VID1, VID0, and VID12.5
These are the inputs for the internal DAC that provides the
reference voltage for output regulation. These pins respond
to TTL logic thresholds. The ISL6568 decodes the VID
inputs to establish the output voltage; see VID Tables for
correspondence between DAC codes and output voltage
settings. These pins are internally pulled high, to
approximately 1.2V, by 40µA (typically) internal current
sources; the internal pull-up current decreases to 0 as the
VID voltage approaches the internal pull-up voltage. All VID
pins are compatible with external pull-up voltages not
exceeding the IC’s bias voltage (VCC).
The VID12.5 pin also serves as the internal DAC compliance
selector. The way this pin is connected selects which of the
three internal DAC codes will be used. For VRM10 codes
this pin must be less that 3V. To encode the DAC with Intel
FN9187.4
March 9, 2006
 

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