ISL6568CRZA-T View Datasheet(PDF) - Intersil
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ISL6568CRZA-T Datasheet PDF : 28 Pages
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ISL6568
depending on the status of the BOOT2 and PHASE2 pins,
as described in the PWM Operation section.
In
ISEN
=
IL
-r--D-----S----(---O-----N-----)
RISEN
VIN
CHANNEL N
UPPER MOSFET
SAMPLE
&
HOLD
-
+
IL
ISEN(n)
RISEN
-
IL rDS(ON)
+
CHANNEL N
LOWER MOSFET
ISL6565A INTERNAL CIRCUIT EXTERNAL CIRCUIT
FIGURE 5. ISL6568 INTERNAL AND EXTERNAL CURRENT-
SENSING CIRCUITRY FOR CURRENT BALANCE
The ISL6568 senses the channel load current by sampling
the voltage across the lower MOSFET rDS(ON), as shown in
Figure 5. A ground-referenced operational amplifier, internal
to the ISL6568, is connected to the PHASE node through a
resistor, RISEN. The voltage across RISEN is equivalent to
the voltage drop across the rDS(ON) of the lower MOSFET
while it is conducting. The resulting current into the ISEN pin
is proportional to the channel current, IL. The ISEN current is
sampled and held as described in the Current Sampling
section. From Figure 5, the following equation for In is
derived where IL is the channel current.
In
=
IL
r---D----S----(--O----N-----)
RISEN
(EQ. 3)
Output Voltage Setting
The ISL6568 uses a digital to analog converter (DAC) to
generate a reference voltage based on the logic signals at the
VID pins. The DAC decodes the 5 or 6-bit logic signals into
one of the discrete voltages shown in Tables 2, 3, and 4.
Each VID pin is pulled up to an internal 1.2V voltage by a
weak current source (40µA current), which decreases to 0 as
the voltage at the VID pin varies from 0 to the internal 1.2V
pull-up voltage. External pull-up resistors or active-high
output stages can augment the pull-up current sources, up to
a voltage of 5V.
.The ISL6568 accommodates three different DAC ranges:
Intel VRM9.0, AMD Hammer, or Intel VRM10.0. The state of
the VID12.5 pin decides which DAC version is active. Refer
to Table 1 for a description of how to select the desired DAC
version.
TABLE 1. ISL6568 DAC SELECT TABLE
DAC VERSION
VID12.5 PIN CONDITION
VRM10.0
Less then 3V
VRM9.0
50kΩ resistor to +5V
AMD HAMMER
5kΩ resistor to +5V
TABLE 2. AMD HAMMER VOLTAGE IDENTIFICATION CODES
VID4
VID3
VID2
VID1
VID0 VDAC
1
1
1
1
1
Off
1
1
1
1
0
0.800
1
1
1
0
1
0.825
1
1
1
0
0
0.850
1
1
0
1
1
0.875
1
1
0
1
0
0.900
1
1
0
0
1
0.925
1
1
0
0
0
0.950
1
0
1
1
1
0.975
1
0
1
1
0
1.000
1
0
1
0
1
1.025
1
0
1
0
0
1.050
1
0
0
1
1
1.075
1
0
0
1
0
1.100
1
0
0
0
1
1.125
1
0
0
0
0
1.150
0
1
1
1
1
1.175
0
1
1
1
0
1.200
0
1
1
0
1
1.225
0
1
1
0
0
1.250
0
1
0
1
1
1.275
0
1
0
1
0
1.300
0
1
0
0
1
1.325
0
1
0
0
0
1.350
0
0
1
1
1
1.375
0
0
1
1
0
1.400
0
0
1
0
1
1.425
0
0
1
0
0
1.450
0
0
0
1
1
1.475
0
0
0
1
0
1.500
0
0
0
0
1
1.525
0
0
0
0
0
1.550
TABLE 3. VRM9 VOLTAGE IDENTIFICATION CODES
VID4
VID3
VID2
VID1
VID0 VDAC
1
1
1
1
1
Off
1
1
1
1
0
1.100
1
1
1
0
1
1.125
11
FN9187.3
July 25, 2005
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