ISL6566ACR View Datasheet(PDF) - Intersil
Part Name
Description
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ISL6566ACR Datasheet PDF : 28 Pages
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ISL6566A
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Supply Voltage, PVCC . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +15V
Absolute Boot Voltage, VBOOT . . . . . . . . GND - 0.3V to GND + 36V
Phase Voltage, VPHASE . . . . . . . . GND - 0.3V to 15V (PVCC = 12)
GND - 8V (<400ns, 20µJ) to 24V (<200ns, VBOOT-PHASE = 12V)
Upper Gate Voltage, VUGATE . . . . VPHASE - 0.3V to VBOOT + 0.3V
VPHASE - 3.5V (<100ns Pulse Width, 2µJ) to VBOOT + 0.3V
Lower Gate Voltage, VLGATE. . . . . . . . GND - 0.3V to PVCC + 0.3V
GND - 5V (<100ns Pulse Width, 2µJ) to PVCC+ 0.3V
Input, Output, or I/O Voltage . . . . . . . . . GND - 0.3V to VCC + 0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . Class I JEDEC STD
Thermal Information
Thermal Resistance
θJA (°C/W) θJC (°C/W)
QFN Package (Notes 1, 2) . . . . . . . . . .
32
3.5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
Recommended Operating Conditions
VCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5%
PVCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . +5V to 12V ±5%
Ambient Temperature (ISL6566ACR, ISL6566ACRZ) . . 0°C to 70°C
Ambient Temperature (ISL6566AIR, ISL6566AIRZ) . .-40°C to 85°C
CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational section of this specification is not implied.
NOTES:
1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Specified.
PARAMETER
TEST CONDITIONS
BIAS SUPPLY AND INTERNAL OSCILLATOR
Input Bias Supply Current
Gate Drive Bias Current
VCC POR (Power-On Reset) Threshold
IVCC; ENLL = high
IPVCC; ENLL = high
VCC Rising
VCC Falling
PVCC POR (Power-On Reset) Threshold
PVCC Rising
PVCC Falling
Oscillator Ramp Amplitude (Note 3)
VPP
Maximum Duty Cycle (Note 3)
Oscillator Frequency, FSW
CONTROL THRESHOLDS
RT = 100kΩ (± 0.1%)
ENLL Rising Threshold
ENLL Hysteresis
EN_PH3 Rising Threshold
EN_PH3 Falling Threshold
COMP Shutdown Threshold
COMP Falling
REFERENCE AND DAC
System Accuracy (VID = 1.0V - 1.850V)
System Accuracy (VID = 0.8V - 1.0V)
DAC Input Low Voltage (VR9, VR10)
DAC Input High Voltage (VR9, VR10)
DAC Input Low Voltage (AMD)
MIN
TYP
MAX UNITS
-
15
20
mA
-
1.06
-
mA
4.25
4.38
4.50
V
3.75
3.88
4.00
V
4.25
4.38
4.50
V
3.60
3.88
4.00
V
-
1.50
-
V
-
66.6
-
%
225
250
275 kHz
-
0.66
-
V
-
100
-
mV
1.190 1.220 1.250 V
1.000 1.045 1.090 V
0.2
0.3
0.4
V
-0.5
-
-0.8
-
-
-
0.8
-
-
-
0.5
%
0.8
%
0.4
V
-
V
0.6
V
5
FN9200.2
July 27, 2005
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