ISL6620 View Datasheet(PDF) - Intersil
Part Name
Description
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ISL6620 Datasheet PDF : 30 Pages
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ISL6334B, ISL6334C
Functional Pin Description
VCC - Supplies the power necessary to operate the chip.
The controller starts to operate when the voltage on this pin
exceeds the rising POR threshold and shuts down when the
voltage on this pin drops below the falling POR threshold.
Connect this pin directly to a +5V supply.
GND - Bias and reference ground for the IC. The bottom
metal base of ISL6334B, ISL6334C is the GND.
EN_PWR - This pin is a threshold-sensitive enable input for
the controller. Connecting the 12V supply to EN_PWR
through an appropriate resistor divider provides a means to
synchronize power-up of the controller and the MOSFET
driver ICs. When EN_PWR is driven above 0.875V, the
ISL6334B, ISL6334C is active depending on status of the
EN_VTT, the internal POR, and pending fault states. Driving
EN_PWR below 0.745V will clear all fault states and prime
the ISL6334B, ISL6334C to soft-start when re-enabled.
EN_VTT - This pin is another threshold-sensitive enable
input for the controller. It’s typically connected to VTT output
of VTT voltage regulator in the computer mother board.
When EN_VTT is driven above 0.875V, the ISL6334B,
ISL6334C is active depending on status of the EN_PWR, the
internal POR, and pending fault states. Driving EN_VTT
below 0.745V will clear all fault states and prime the
ISL6334B, ISL6334C to soft-start when re-enabled.
VDIFF, VSEN and RGND - VSEN and RGND form the
precision differential remote-sense amplifier. This amplifier
converts the differential voltage of the remote output to a
single-ended voltage referenced to local ground. VDIFF is
the amplifier’s output and the input to the regulation and
protection circuitry. Connect VSEN and RGND to the sense
pins of the remote load.
FB and COMP - Inverting input and output of the error
amplifier respectively. FB can be connected to VDIFF
through a resistor. A properly chosen resistor between
VDIFF and FB can set the load line (droop), because the
sensed current will flow out of FB pin. The droop scale factor
is set by the ratio of the ISEN resistors and the inductor DCR
or the dedicated current sense resistor. COMP is tied back to
FB through an external R-C network to compensate the
regulator.
DAC and REF - The DAC pin is the output of the precision
internal DAC reference. The REF pin is the positive input of
the Error Amplifier. In typical applications, a 1kΩ, 1% resistor
is used between DAC and REF to generate a precision
offset voltage. This voltage is proportional to the offset
current determined by the offset resistor from OFS to ground
or VCC. A capacitor is used between REF and ground to
smooth the voltage transition during Dynamic VID™
operations.
VR_RDY - VR_RDY indicates that soft-start has completed
and the output voltage is within the regulated range around
VID setting. It is an open-drain logic output. When OCP or
OVP occurs, VR_RDY will be pulled to low. It will also be
pulled low if the output voltage is below the undervoltage
threshold.
OFS - The OFS pin can be used to program a DC offset
current, which will generate a DC offset voltage between the
REF and DAC pins. The offset current is generated via an
external resistor and precision internal voltage references.
The polarity of the offset is selected by connecting the
resistor to GND or VCC. For no offset, the OFS pin should
be left unterminated.
TCOMP - Temperature compensation scaling input. The
voltage sensed on the TM pin is utilized as the temperature
input to adjust IDROOP and the overcurrent protection limit to
effectively compensate for the temperature coefficient of the
current sense element. To implement the integrated
temperature compensation, a resistor divider circuit is needed
with one resistor being connected from TCOMP to VCC of the
controller and another resistor being connected from TCOMP
to GND. Changing the ratio of the resistor values will set the
gain of the integrated thermal compensation. When integrated
temperature compensation function is not used, connect
TCOMP to GND.
TM - TM is an input pin for the VR temperature measurement.
Connect this pin through an NTC thermistor to GND and a
resistor to VCC of the controller. The voltage at this pin is
reverse proportional to the VR temperature. The ISL6334B,
ISL6334C monitors the VR temperature based on the voltage
at the TM pin and outputs VR_HOT and VR_FAN signals.
VR_HOT - VR_HOT is used as an indication of high VR
temperature. It is an open-drain logic output. It will be pulled
low if the measured VR temperature is less than a certain
level, and open when the measured VR temperature
reaches a certain level. A external pull-up resistor is needed.
H_CPURST_N - This pin determines whether the PSI# input
is recognized and the IC enters the low-power, phase
shedding state. While in a logic low state and for 45ms
(typically) after returning high, it prevents the chip from
entering lower power mode operation by locking out the
PSI# input. Left open at start-up, this pin is pulled to about
1.2V by an internal current source, and it enables the 45ms
PSI# lockout. To disable this functionality at all times,
connect this pin to VCC. See “PWM and PSI# Operation” on
page 13 for details.
PWM1-4 - Pulse width modulation outputs. Connect these
pins to the PWM input pins of the Intersil driver IC. The
number of active channels is determined by the state of
PWM2, PWM3 and PWM4. Tie PWM2 to VCC to configure
for 1-phase operation. Tie PWM3 to VCC to configure for 2-
phase operation. Tie PWM4 to VCC to configure for 3-phase
operation. In addition, tie PSI# to GND to configure for single
phase operation with diode emulation.
11
FN6689.2
August 31, 2010
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