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ISL6217ACVZ-T View Datasheet(PDF) - Intersil

Part Name
Description
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ISL6217ACVZ-T Datasheet PDF : 20 Pages
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ISL6217A
Absolute Voltage Ratings
Supply Voltage, VDD, VDDP . . . . . . . . . . . . . . . . . . . . . . . . -0.3-+7V
Battery Voltage, VBAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+25V
Boot1,2 and UGATE1,2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+35V
Phase1,2 and ISEN1,2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+30V
Boot1,2 with respect to Phase1,2 . . . . . . . . . . . . . . . . . . . . . . +6.5V
UGATE1,2 . . . . . . . . . . . . . . . (Phase1,2 - 0.3V) to (Boot1,2 + 0.3V)
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VDD + 0.3V)
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (°C/W)
TSSOP Package (Note 1) . . . . . . . . . . . . . . . . . . . .
72°
Maximum Operating Junction Temperature. . . . . . . . . . . . . . . 125°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
Recommended Operating Conditions
Supply Voltage, VDD, VDDP . . . . . . . . . . . . . . . . . . . . . . . +5V ±5%
Ambient Temperature. . . . . . . . . . . . . . . . . . . . . . . . . .-10°C to 85°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . .-10°C to 125°C
CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational section of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air.
Electrical Specifications Operating Conditions: VDD = 5V, TA = -10°C to 85°C, Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
MIN TYP
INPUT POWER SUPPLY
Input Supply Current, I(VDD)
EN = 3.3V, DSEN# = 0, DRSEN = 0, PWRCH = 0
EN = 0V
-
1.4
-
1
POR (Power-On Reset) Threshold
REFERENCE AND DAC
VDD Rising
VDD Falling
4.35 4.45
4.05 4.20
System Accuracy
Percent system deviation from programmed VID Codes @ 1.356
-0.8
-
DAC (VID0 - VID5) Input Low Voltage DAC Programming Input Low Threshold Voltage
-
-
DAC (VID0 - VID5) Input High
Voltage
DAC Programming Input High Threshold Voltage
0.7
-
Maximum Output Voltage
- 1.708
Minimum Output Voltage
-
0.70
CHANNEL GENERATOR
Frequency, FSW
Adjustment Range
RFset = 243K, ±1%
Guaranteed by Design
225 250
0.25
-
ERROR AMPLIFIER
DC Gain
-
100
Gain-Bandwidth Product
Slew Rate
ISEN
CL = 20pF
CL = 20pF
-
18
-
4.0
Full Scale Input Current
-
32
Overcurrent Threshold
Soft-Start Current
ROCSET = 124K
-
64
-
31
Droop Current
27
28
GATE DRIVER
UGATE Source Resistance
500mA Source Current
-
1
UGATE Source Current
VUGATE-PHASE = 2.5V
-
2
MAX
-
-
4.5
4.40
0.8
0.3
-
-
-
275
1.0
-
-
-
-
-
-
30
1.5
-
UNITS
mA
µA
V
V
%
V
V
V
V
kHz
MHz
dB
MHz
V/µs
µA
µA
µA
µA
A
3
FN9107.3
June 30, 2005
 

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