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ISL6207CRZ View Datasheet(PDF) - Intersil

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ISL6207CRZ Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
ISL6207
PWM
UGATE
LGATE
tPDLLGATE
tPDHUGATE
tRUGATE
tPDLUGATE
tFUGATE
1V
1V
tFLGATE
FIGURE 1. TIMING DIAGRAM
tRLGATE
tPDHLGATE
A falling transition on PWM indicates the turn-off of the upper
MOSFET and the turn-on of the lower MOSFET. A short
propagation delay [tPDLUGATE] is encountered before the
upper gate begins to fall [tFUGATE]. Again, the adaptive shoot-
through circuitry determines the lower gate delay time
tPDHLGATE. The upper MOSFET gate-to-source voltage is
monitored, and the lower gate is allowed to rise, after the
upper MOSFET gate-to-source voltage drops below 1V. The
lower gate then rises [tRLGATE], turning on the lower
MOSFET.
This driver is optimized for converters with large step down
ratio, such as those used in a mobile-computer core voltage
regulator. The lower MOSFET is usually sized much larger.
This driver is optimized for converters with large step down
compared to the upper MOSFET because the lower
MOSFET conducts for a much longer time in a switching
period. The lower gate driver is therefore sized much larger
to meet this application requirement. The 0.4on-resistance
and 4A sink current capability enable the lower gate driver to
absorb the current injected to the lower gate through the
drain-to-gate capacitor of the lower MOSFET and prevent a
shoot through caused by the high dv/dt of the phase node.
Three-State PWM Input
A unique feature of the ISL6207 and other Intersil drivers is
the addition of a shutdown window to the PWM input. If the
PWM signal enters and remains within the shutdown window
for a set holdoff time, the output drivers are disabled and
both MOSFET gates are pulled and held low. The shutdown
state is removed when the PWM signal moves outside the
shutdown window. Otherwise, the PWM rising and falling
thresholds outlined in the ELECTRICAL SPECIFICATIONS
determine when the lower and upper gates are enabled.
During start-up, PWM should be in the three-state position
(1/2 VCC). However, with rising VCC, the active tracking
elements for PWM are not active until VCC > 1.2V, which
leaves PWM in a high impedance (undetermined) state;
therefore, a 500kresistor must be place from the PWM pin
to GND.
Adaptive Shoot-Through Protection
Both drivers incorporate adaptive shoot-through protection
to prevent upper and lower MOSFETs from conducting
simultaneously and shorting the input supply. This is
accomplished by ensuring the falling gate has turned off one
MOSFET before the other is allowed to turn on.
During turn-off of the lower MOSFET, the LGATE voltage is
monitored until it reaches a 1V threshold, at which time the
UGATE is released to rise. Adaptive shoot-through circuitry
monitors the upper MOSFET gate-to-source voltage during
UGATE turn-off. Once the upper MOSFET gate-to-source
voltage has dropped below a threshold of 1V, the LGATE is
allowed to rise.
Internal Bootstrap Diode
This driver features an internal bootstrap Schottky diode.
Simply adding an external capacitor across the BOOT and
PHASE pins completes the bootstrap circuit.
The bootstrap capacitor must have a maximum voltage
rating above the maximum battery voltage plus 5V. The
bootstrap capacitor can be chosen from the following
equation:
CB
O
OT
---Q----G-----A----T---E----
VBOOT
where QGATE is the amount of gate charge required to fully
charge the gate of the upper MOSFET. The VBOOT term is
defined as the allowable droop in the rail of the upper drive.
As an example, suppose an upper MOSFET has a gate
charge, QGATE, of 25nC at 5V and also assume the droop in
the drive voltage over a PWM cycle is 200mV. One will find
that a bootstrap capacitance of at least 0.125µF is required.
5
FN9075.7
July 25, 2005
 

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