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ISL28276FBZ-T7 View Datasheet(PDF) - Intersil

Part NameDescriptionManufacturer
ISL28276FBZ-T7 Single, Dual and Quad Micropower Single Supply Rail-to-Rail Input and Output (RRIO) Precision Op Amp Intersil
Intersil Intersil
ISL28276FBZ-T7 Datasheet PDF : 19 Pages
First Prev 11 12 13 14 15 16 17 18 19
ISL28176, ISL28276, ISL28476
Pin Descriptions (Continued)
ISL28176 ISL28276
ISL28276
ISL28476
PIN EQUIVALENT
(8 LD SOIC) (8 LD SOIC) (16 LD QSOP) (16 LD QSOP) NAME CIRCUIT
DESCRIPTION
4
4
7
13
V-
Circuit 4 Negative power supply
14
IN+_D Circuit 1 Amplifier D non-inverting input
15
IN-_D Circuit 1 Amplifier D inverting input
16
OUT_D Circuit 3 Amplifier D output
6
EN_A Circuit 2 Amplifier A enable pin internal pull-down; Logic “1”
selects the disabled state; Logic “0” selects the enabled
state.
11
EN_B Circuit 2 Amplifier B enable pin with internal pull-down; Logic “1”
selects the disabled state; Logic “0” selects the enabled
state.
V+
IN-
IN+
V-
CIRCUIT 1
LOGIC
PIN
V+
V-
CIRCUIT 2
V+
OUT
V-
CIRCUIT 3
V+
CAPACITIVELY
COUPLED
ESD CLAMP
V-
CIRCUIT 4
Applications Information
Introduction
The ISL28176, ISL28276 and ISL28476 are single, dual and
quad BiCMOS rail-to-rail input, output (RRIO) micropower
precision operational amplifiers. These devices are designed
to operate from a single supply (2.4V to 5.0V) or dual
supplies (±1.2V to ±2.5V) while drawing only 120µA
(ISL28276) of supply current. This combination of low power
and precision performance makes these devices suitable for
solar and battery power applications.
Rail-to-Rail Input
Many rail-to-rail input stages use two differential input pairs, a
long-tail PNP (or PFET) and an NPN (or NFET). Severe
penalties have to be paid for this circuit topology. As the input
signal moves from one supply rail to another, the operational
amplifier switches from one input pair to the other causing
drastic changes in input offset voltage and an undesired
change in magnitude and polarity of input offset current.
The devices achieve rail-to-rail input without sacrificing
important precision specifications and degrading distortion
performance. The devices’ input offset voltage exhibits a
smooth behavior throughout the entire common-mode input
range. The input bias current versus the common-mode
voltage range gives us an undistorted behavior from typically
down to the negative rail to 10% higher than the V+ rail (0.5V
higher than V+ when V+ equals 5V).
Input Protection
All input terminals have internal ESD protection diodes to the
positive and negative supply rails, limiting the input voltage
to within one diode beyond the supply rails. Both parts have
additional back-to-back diodes across the input terminals. If
overdriving the inputs is necessary, the external input current
must never exceed 5mA. External series resistors may be
used as an external protection to limit excessive external
voltage and current from damaging the inputs.
Input Bias Current Compensation
The devices contain an input bias cancellation circuit which
reduces the bias currents down to a typical of 500pA while
maintaining an excellent bandwidth for a micro-power
operational amplifier. The input stage transistors are still
biased with adequate current for speed but the canceling
circuit sinks most of the base current, leaving a small fraction
as input bias current.
Rail-to-Rail Output
A pair of complementary MOSFET devices are used to
achieve the rail-to-rail output swing. The NMOS sinks
current to swing the output in the negative direction. The
PMOS sources current to swing the output in the positive
direction. Both parts, with a 100kΩ load, will typically swing to
within 4mV of the positive supply rail and within 3mV of the
negative supply rail.
16
FN6301.4
June 23, 2009
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