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ISL29012 View Datasheet(PDF) - Intersil

Part NameDescriptionManufacturer
ISL29012 Light-to-Digital Output Sensor with High Sensitivity, Gain Selection, Interrupt Function and I2C Bus™ Intersil
Intersil Intersil
ISL29012 Datasheet PDF : 15 Pages
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ISL29012
The transfer function effectively for each timing mode
becomes:
INTERNAL TIMING MODE
E
=
R-----a----n----g----e----(--k---)----×-----1---R----0------E0-------X-k-------TΩ------
2n
×
D
A
T
A
(EQ. 4)
EXTERNAL TIMING MODE
E
=
R-----a----n----g----e----(--k---)----×-----1---R----0------E0-------X-k-------TΩ------ × DATA
COUNTER
(EQ. 5)
n = 3, 7, 11, or 15. This is the number of clock cycles
programmed in the command register.
Range(k) is the user defined range in the Gain/Range bit
in the command register.
REXT is an external scaling resistor hardwired to the REXT
pin.
DATA is the output sensor reading in number of counts
available at the data register.
2n represents the maximum number of counts possible in
Internal Timing Mode. For the External Timing Mode the
maximum number of counts is stored in the data register
named COUNTER.
COUNTER is the number increments accrued for between
integration time for External Timing Mode.
Gain/Range, Range(k)
The Gain/Range can be programmed in the control register
to give Range(k) determining the FSR. Note that Range(k) is
not the FSR (see Equation 3). Range(k) provides four
constants depending on programmed k that will be scaled by
REXT (see Table 9). Unlike REXT, Range(k) dynamically
adjusts the FSR. This function is especially useful when light
conditions are varying drastically while maintaining excellent
resolution.
Number of Clock Cycles, n-bit ADC
The number of clock cycles determines “n” in the n-bit ADC; 2n
clock cycles is a n-bit ADC. n is programmable in the command
register in the width function. Depending on the application, a
good balance of speed, and resolution has to be considered
when deciding for n. For fast and quick measurement, choose
the smallest n = 3. For maximum resolution without regard of
time, choose n = 15. Table 12 compares the trade-off between
integration time and resolution. See Equations 10 and 11 for the
relation between integration time and n. See Equation 3 for the
relation of n and resolution.
TABLE 12. RESOLUTION AND INTEGRATION TIME
SELECTION
RANGE1
fOSC = 327kHz
RANGE4
fOSC = 655kHz
tINT RESOLUTION tINT RESOLUTION
n
(ms) LUX/COUNT (ms) (LUX/COUNT)
15
200
0.06
100
2
11
12.8
1.0
6.4
62.5
7
0.8
15.6
0.4
1,000
3
0.05
250
0.025
16,000
REXT = 100kΩ
External Scaling Resistor REXT and fOSC
The ISL29012 uses an external resistor REXT to fix its
internal oscillator frequency, fOSC. Consequently, REXT
determines the fOSC, integration time and the FSR of the
device. fOSC, a dual speed mode oscillator, is inversely
proportional to REXT. For user simplicity, the proportionality
constant is referenced to fixed constants 100kΩ and 655kHz
in Equations 6 and 7:
fOSC1
=
1--
2
×
-1---0---0----k---Ω---
REXT
×
684 k
H
z
(EQ. 6)
fOSC2
=
-1---0---0----k---Ω---
REXT
×
684
k
H
z
(EQ. 7)
fOSC1 is oscillator frequency when Range1 or Range2 are
set. This is nominally 342kHz when REXT is 100kΩ.
fOSC2 is the oscillator frequency when Range3 or Range4
are set. This is nominally 684kHz when REXT is 100kΩ.
When the Range/Gain bits are set to Range1 or Range2,
fOSC runs at half speed compared to when Range/Gain bits
are set to Range3 and Range4 by using Equation 8:
fOSC1
=
1--
2
(fO
S
C
2)
(EQ. 8)
The automatic fOSC adjustment feature allows significant
improvement of signal-to-noise ratio when detecting very low
lux signals.
Integration Time or Conversion Time
Integration time is the period during which the device’s
analog-to-digital ADC converter samples the photodiode
current signal for a lux measurement. Integration time, in
other words, is the time to complete the conversion of analog
photodiode current into a digital signal--number of counts.
Integration time affects the measurement resolution. For
better resolution, use a longer integration time. For short and
fast conversions, use a shorter integration time.
The ISL29012 offers user flexibility in the integration time to
balance resolution, speed and noise rejection. Integration time
can be set internally or externally and can be programmed in
the command register 00(hex) Bit 5.
7
FN6476.1
December 10, 2008
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