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ISL1209IU10 View Datasheet(PDF) - Intersil
Part Name
Description
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ISL1209IU10
Low Power RTC with Battery Backed SRAM and Event Detection
Intersil
ISL1209IU10 Datasheet PDF : 24 Pages
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ISL1209
SDA vs. SCL Timing
t
F
t
HIGH
SCL
t
SU:STA
SDA
(INPUT TIMING)
t
SU:DAT
t
HD:STA
SDA
(OUTPUT TIMING)
t
LOW
t
R
t
HD:DAT
t
AA
t
DH
Symbol Table
WAVEFORM INPUTS
Must be steady
OUTPUTS
Will be steady
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Don’t Care:
Changes Allowed
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Changing:
State Not Known
N/A
Center Line is
High Impedance
t
SU:STO
t
BUF
5
FN6109.1
September 27, 2005
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